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AN4635 数据表(PDF) 20 Page - STMicroelectronics |
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AN4635 数据表(HTML) 20 Page - STMicroelectronics |
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20 / 34 page  Power consumption comparison AN4635 20/34 DocID027290 Rev 1 and received bytes the duty cycle makes it less prominent, at higher speeds the core spends more time in low power state. There is, of course, no observable difference during the Stop mode. Figure 6. Core clock speed comparison Table 8. Configurations - Core clock speed Curve in Figure 6 Black Green Red Idle mode between transmissions Stop JTAG interface OFF Current average over phases 2, 3 and 4 27.32 µA 9.39 µA 12.43 µA Clock 2 MHz MSI 130 kHz MSI 500 kHz MSI Voltage regulator Range 3 AHB/APB ratio 1/1 ULP/FWU +/+ |
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