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LTC1753

1753fa

mounted next to the external MOSFET which is expected

to run the hottest –– often the high-side device, Q1. Elec-

trically, the thermistor should form a voltage divider with

another resistor, R1, connected to VCC. Their midpoint

should be connected to OUTEN (see Figure 6). As the

temperature increases, the OUTEN pin voltage is reduced.

Under normal operating conditions, the OUTEN pin should

stay above 1.7V and all circuits will function normally. If

the temperature gets abnormally high, the OUTEN pin

voltage will eventually drop below 1.7V, the LTC1753

disables both FET drivers. If OUTEN decreases below

1.2V, the LTC1753 enters shutdown mode. To activate any

of these three modes, the OUTEN voltage must drop below

the respective threshold for longer than 30

µs.

MOSFET Gate Drive

Power for the internal MOSFET drivers is supplied by

PVCC. This supply must be above the input supply voltage

by at least one power MOSFET VGS(ON) for efficient

operation. For a typical application, PVCC should be con-

nected to a 12V power supply.

If the OUTEN pin is low, G1 and G2 are both held low to

prevent output voltage undershoot. As VCC and PVCC

power up from a 0V condition, an internal undervoltage

lockout circuit prevents G1 and G2 from going high until

VCC reaches about 3.5V. If VCC powers up while PVCC is at

ground potential, the SS is forced to ground potential

internally. SS clamps the COMP pin low and prevents the

drivers from turning on. On power-up or recovery from

thermal shutdown, the drivers are designed such that G2

is held low until G1 first goes high.

Power MOSFETs

Two N-channel power MOSFETs are required for most

LTC1753 circuits. Logic level MOSFETs should be used

and they should be selected based on on-resistance and

GATE threshold voltage considerations. RDS(ON) should

be chosen based on input and output voltage, allowable

power dissipation and maximum required output current.

GATE threshold voltages for logic level MOSFETs are

lower than standard MOSFETs. A MOSFET whose RDS(ON)

is rated at VGS = 4.5V does not necessarily have a logic

level MOSFET GATE threshold voltage. Using standard

MOSFETs instead of logic level MOSFETs can cause start-

up problems, especially if PVCC is derived from a charge

pump scheme. In a typical LTC1753 buck converter circuit

the average inductor current is equal to the output load

current. This current is always flowing through either Q1

or Q2 with the power dissipation split up according to the

duty cycle:

DC Q

OUT

()=

()=−

−

()

VOUT

1753 F06

COUT

VIN

VCC

NTC THERMISTOR

MOUNT IN CLOSE

THERMAL PROXIMITY

TO Q1

LTC1753

OUTEN

Figure 6. OUTEN Pin as a Thermistor Input

Clock Synchronization

The internal oscillator can be synchronized to an external

clock by applying the external clocking signal to the

OUTEN pin. The synchronizing range extends from the

initial operating frequency up to 500kHz. If the external

frequency is much higher than the natural free-running

frequency, the peak-to-peak sawtooth amplitude within

the LTC1753 will decrease. Since the loop gain is inversely

proportional to the amplitude of the sawtooth, the com-

pensation network may need to be adjusted slightly. Note

that the temperature sensing circuitry does not operate

when external synchronization is used.

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