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LTC1753

1753fa

Note 1: Absolute Maximum Ratings are those values beyond which the life

of a device may be impaired.

Note 2: When IFB is taken below GND, it will be clamped by an internal diode.

This pin can handle input currents greater than 100mA below GND without

latchup. In the positive direction, it is not clamped to VCC or PVCC.

Note 3: All currents into device pins are positive; all currents out of the

device pins are negative. All voltages are referenced to ground unless

otherwise specified.

Note 4: The Power Good and FAULT trip thresholds are tested at the 1.8V

output voltage code. The Power Good and FAULT trip thresholds are

guaranteed by design for all other output voltage codes to the same

specification.

Note 5: The LTC1753 goes into the shutdown mode if VID0 to VID4 are

floating. Due to the internal pull-up resistors, there will be an additional

0.25mA/pin if any of the VID0 to VID4 pins are pulled low.

Note 6: Supply current in normal operation is dominated by the current

needed to charge and discharge the external FET gates. This will vary with

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

GERR

Error Amplifier Open-Loop DC Gain

(Note 7)

gmERR

Error Amplifier Transconductance

(Note 7)

0.9

1.6

2.3

millimho

BWERR

Error Amplifier – 3dB Bandwidth

COMP = Open (Note 11)

400

kHz

IIMAX

IMAX Sink Current

VIMAX = VCC

150

190

230

µA

ISS

Soft-Start Source Current

VSS = 0V, VIMAX = 0V, VIFB = VCC

–16

– 12

– 8

µA

ISSIL

Maximum Soft-Start Sink Current

VSENSE = VOUT, VIMAX = VCC, VIFB = 0V

150

µA

Under Current Limit

(Notes 8, 9), VSS = VCC

ISSHIL

Soft-Start Sink Current Under Hard

VSENSE = 0V, VIMAX = VCC, VIFB = 0V

Current Limit

tSSHIL

Hard Current Limit Hold Time

VSENSE = 0V, VIMAX = 4V, VIFB↓ from 5V

500

µs

tPWRGD

Power Good Response Time

↑

VSENSE↑ from 0V to Rated VOUT

0.5

tPWRBAD

Power Good Response Time

↓

VSENSE↓ from Rated VOUT to 0V

200

500

1000

µs

tFAULT

FAULT Response Time

VSENSE↑ from Rated VOUT to VCC

200

500

1000

µs

VOTDD

Overtemperature Driver Disable

OUTEN

↓, VID0 to VID4 = 0 (Note 10) (Figure 3)

1.6

1.7

1.8

VSHDN

Shutdown

OUTEN

↓, VID0 to VID4 = 0 (Note 10) (Figure 3)

0.8

tr, tf

Driver Rise and Fall Time

(Figure 4)

150

tNOL

Driver Nonoverlap Time

(Figure 4)

100

VIH

VID0 to VID4 Input High Voltage

VIL

VID0 to VID4 Input Low Voltage

0.8

RSENSE

SENSE Input Resistance

108

Ω

RVID

VID0 to VID4 Internal Pull-Up

Ω

Resistance

VOL

Digital Output Low Voltage

ISINK = 1.6mA, Measured at PWRGD and FAULT

0.1

0.4

ISINK

Digital Output Sink Current

the LTC1753 operating frequency, supply voltage and the external FETs

used.

Note 7: The open-loop DC gain and transconductance from the SENSE pin to

COMP pin will be (GERR)(1.26/3.3) and (gmERR)(1.26/3.3) respectively.

Note 8: The current limiting amplifier can sink but cannot source current.

Under normal (not current limited) operation, the output current will be zero.

Note 9: Under typical soft current limit, the net soft-start discharge current

will be 60

µA (ISSIL) + [–12µA(ISS)] ≅ 48µA. The soft-start sink-to-source

current ratio is designed to be 5:1.

Note 10: When VID0 to VID4 are all HIGH, the LTC1753 will be forced to

shut down internally. The OUTEN trip voltages are guaranteed by design for

all other input codes.

Note 11: This parameter is guaranteed by design and correlation and is not

tested in production.

ELECTRICAL CHARACTERISTICS

The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.

VCC = 5V, PVCC = 12V, unless otherwise noted. (Note 3)

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