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DM385 数据表(PDF) 69 Page - Texas Instruments |
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DM385 数据表(HTML) 69 Page - Texas Instruments |
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69 / 281 page  DM385, DM388 www.ti.com SPRS821D – MARCH 2013 – REVISED DECEMBER 2013 3.3.5 DDR2/DDR3/DDR3L Memory Controller Table 3-16. DDR2/DDR3/DDR3L Memory Controller 0 Terminal Functions SIGNAL NAME [1] DESCRIPTION [2] TYPE [3] AAR BALL [4] DDR[0]_A[0] DDR[0] Address Bus O AL24 DDR[0]_A[1] DDR[0] Address Bus O AC22 DDR[0]_A[2] DDR[0] Address Bus O AJ23 DDR[0]_A[3] DDR[0] Address Bus O AJ27 DDR[0]_A[4] DDR[0] Address Bus O AK28 DDR[0]_A[5] DDR[0] Address Bus O AH27 DDR[0]_A[6] DDR[0] Address Bus O AK30 DDR[0]_A[7] DDR[0] Address Bus O AG23 DDR[0]_A[8] DDR[0] Address Bus O AL29 DDR[0]_A[9] DDR[0] Address Bus O AK29 DDR[0]_A[10] DDR[0] Address Bus O AD23 DDR[0]_A[11] DDR[0] Address Bus O AK24 DDR[0]_A[12] DDR[0] Address Bus O AH23 DDR[0]_A[13] DDR[0] Address Bus O AK23 DDR[0]_A[14] DDR[0] Address Bus O AL23 DDR[0]_A[15] DDR[0] Address Bus O AK22 DDR[0]_BA[0] DDR[0] Bank Address outputs O AK26 DDR[0]_BA[1] DDR[0] Bank Address outputs O AF23 DDR[0]_BA[2] DDR[0] Bank Address outputs O AH25 DDR[0]_CAS DDR[0] Column Address Strobe output O AK25 DDR[0]_CKE DDR[0] Clock Enable O AD20 DDR[0]_CLK DDR[0] Negative Clock O AK27 DDR[0]_CLK DDR[0] Clock O AL27 DDR[0]_CS[0] DDR[0] Chip Select O AB21 DDR[0]_D[0] DDR[0] Data Bus I/O AL9 DDR[0]_D[1] DDR[0] Data Bus I/O AK9 DDR[0]_D[2] DDR[0] Data Bus I/O AK10 DDR[0]_D[3] DDR[0] Data Bus I/O AJ11 DDR[0]_D[4] DDR[0] Data Bus I/O AH11 DDR[0]_D[5] DDR[0] Data Bus I/O AD9 DDR[0]_D[6] DDR[0] Data Bus I/O AF11 DDR[0]_D[7] DDR[0] Data Bus I/O AL12 DDR[0]_D[8] DDR[0] Data Bus I/O AJ12 DDR[0]_D[9] DDR[0] Data Bus I/O AG12 DDR[0]_D[10] DDR[0] Data Bus I/O AD12 DDR[0]_D[11] DDR[0] Data Bus I/O AB12 DDR[0]_D[12] DDR[0] Data Bus I/O AK13 DDR[0]_D[13] DDR[0] Data Bus I/O AC13 DDR[0]_D[14] DDR[0] Data Bus I/O AL14 DDR[0]_D[15] DDR[0] Data Bus I/O AK14 DDR[0]_D[16] DDR[0] Data Bus I/O AH15 DDR[0]_D[17] DDR[0] Data Bus I/O AF15 DDR[0]_D[18] DDR[0] Data Bus I/O AD15 DDR[0]_D[19] DDR[0] Data Bus I/O AK16 DDR[0]_D[20] DDR[0] Data Bus I/O AJ16 Copyright © 2013, Texas Instruments Incorporated Device Pins 69 Submit Documentation Feedback Product Folder Links: DM385 DM388 |
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