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DM385 数据表(PDF) 16 Page - Texas Instruments |
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DM385 数据表(HTML) 16 Page - Texas Instruments |
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16 / 281 page  DM385, DM388 SPRS821D – MARCH 2013 – REVISED DECEMBER 2013 www.ti.com Table 2-3. L3 Memory Map (continued) START ADDRESS END ADDRESS SIZE DESCRIPTION (HEX) (HEX) 0x47C0_C000 0x47C0_C3FF 1KB Reserved 0x47C0_C400 0x47C0_C7FF 1KB DDR PHY Registers 0x47C0_C800 0x47C0_CBFF 1KB Reserved 0x47C0_CC00 0x47C0_CFFF 1KB Reserved 0x47C0_D000 0x47FF FFFF 4052KB Reserved 0x4800_0000 0x48FF_FFFF 16MB L4 Slow Peripheral Domain (see Table 2-5) 0x4900_0000 0x490F_FFFF 1MB EDMA TPCC Registers 0x4910_0000 0x497F_FFFF 7MB Reserved 0x4980_0000 0x498F_FFFF 1MB EDMA TPTC0 Registers 0x4990_0000 0x499F_FFFF 1MB EDMA TPTC1 Registers 0x49A0_0000 0x49AF_FFFF 1MB EDMA TPTC2 Registers 0x49B0_0000 0x49BF_FFFF 1MB EDMA TPTC3 Registers 0x49C0_0000 0x49FF_FFFF 4MB Reserved 0x4A00_0000 0x4AFF_FFFF 16MB L4 Fast Peripheral Domain (see Table 2-4) 0x4B00_0000 0x4BFF_FFFF 16MB Emulation Subsystem 0x4C00_0000 0x4CFF_FFFF 16MB DDR Registers 0x4D00_0000 0x4DFF_FFFF 16MB Reserved 0x4E00_0000 0x4FFF_FFFF 32MB DDR DMM Registers 0x5000_0000 0x50FF_FFFF 16MB GPMC Registers 0x5100_0000 0x51FF_FFFF 16MB PCIE Registers 0x5200_0000 0x54FF_FFFF 48MB Reserved 0x5500_0000 0x55FF_FFFF 16MB Media Controller 0x5600_0000 0x56FF_FFFF 16MB Reserved 0x5700_0000 0x57FF_FFFF 16MB Reserved 0x5800_0000 0x58FF_FFFF 16MB HDVICP2 Configuration 0x5900_0000 0x59FF_FFFF 16MB HDVICP2 SL2 0x5A00_0000 0x5BFF_FFFF 32MB Reserved 0x5C00_0000 0x5DFF_FFFF 32MB ISS 0x5E00_0000 0x5FFF_FFFF 32MB Reserved 0x6000_0000 0x7FFF_FFFF 512MB DDR DMM Tiler Window (see Table 2-6) 0x8000_0000 0xFFFF_FFFF 2GB DDR 0x1 0000 0000 0x1 FFFF FFFF 4GB DDR DMM Tiler Extended Address Map (ISS and HDVPSS only) [see Table 2-6] 16 Device Overview Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: DM385 DM388 |
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