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DM385 数据表(PDF) 87 Page - Texas Instruments |
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DM385 数据表(HTML) 87 Page - Texas Instruments |
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87 / 281 page  DM385, DM388 www.ti.com SPRS821D – MARCH 2013 – REVISED DECEMBER 2013 3.3.17 Reset, Interrupts, and JTAG Interface 3.3.17.1 Interupts Table 3-35. Interrupts Terminal Functions SIGNAL NAME [1] DESCRIPTION [2] TYPE [3] AAR BALL [4] NMI Non-Maskable Interrupt input I AH31 3.3.17.2 JTAG Table 3-36. JTAG Terminal Functions SIGNAL NAME [1] DESCRIPTION [2] TYPE [3] AAR BALL [4] EMU0 Emulator pin 0 I/O A18 EMU1 Emulator pin 1 I/O B19 EMU2 Emulator pin 2 I/O F24 EMU3 Emulator pin 3 I/O C25 EMU4 Emulator pin 4 I/O C28 RTCK JTAG return clock output. The internal pullup (IPU) is O N29 enabled for this pin when the device is in reset and the IPU is disabled (DIS) when reset is released. TCLK JTAG test clock input I T29 TDI JTAG test data input I N28 TDO JTAG test port data output O U26 TMS JTAG test port mode select input. For proper operation, I T31 do not oppose the IPU on this pin. TRST JTAG test port reset input I U24 3.3.17.3 Reset Table 3-37. Reset Terminal Functions SIGNAL NAME [1] DESCRIPTION [2] TYPE [3] AAR BALL [4] POR Power-On Reset input I AH30 RESET Device Reset input I AH29 RSTOUT_WD_OUT Reset output (RSTOUT) or watchdog out (WD_OUT). If O AJ30 this pin is unused, it can be left unconnected. Copyright © 2013, Texas Instruments Incorporated Device Pins 87 Submit Documentation Feedback Product Folder Links: DM385 DM388 |
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