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DM385 数据表(PDF) 121 Page - Texas Instruments |
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DM385 数据表(HTML) 121 Page - Texas Instruments |
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121 / 281 page  DM385, DM388 www.ti.com SPRS821D – MARCH 2013 – REVISED DECEMBER 2013 The L4 interconnect is a non-blocking peripheral interconnect that provides low-latency access to a large number of low-bandwidth, physically-dispersed target cores. The L4 can handle incoming traffic from up to four initiators and can distribute those communication requests to and collect related responses from up to 63 targets. The device provides two interfaces with L3 interconnect for high-speed and standard peripherals. Table 5-2. L4 Peripheral Connectivity(1) MASTERS L4 PERIPHERALS ARM Cortex-A8 EDMA TPTC0 EDMA TPTC1 EDMA TPTC2 EDMA TPTC3 PCIe M2 (64-bit) L4 Fast Peripherals Port 0/1 EMAC SW Port0 Port1 Port0 Port1 Port0 Port1 L4 Slow Peripherals Port 0/1 I2C0 Port0 Port1 Port0 Port1 Port0 Port1 I2C1 Port0 Port1 Port0 Port1 Port0 Port1 I2C2 Port0 Port1 Port0 Port1 Port0 Port1 I2C3 Port0 Port1 Port0 Port1 Port0 Port1 SPI0 Port0 Port1 Port0 Port1 Port0 Port1 SPI1 Port0 Port1 Port0 Port1 Port0 Port1 SPI2 Port0 Port1 Port0 Port1 Port0 Port1 SPI3 Port0 Port1 Port0 Port1 Port0 Port1 UART0 Port0 Port1 Port0 Port1 Port0 Port1 UART1 Port0 Port1 Port0 Port1 Port0 Port1 UART2 Port0 Port1 Port0 Port1 Port0 Port1 Timer1 Port0 Port1 Port0 Port1 Port0 Port1 Timer2 Port0 Port1 Port0 Port1 Port0 Port1 Timer3 Port0 Port1 Port0 Port1 Port0 Port1 Timer4 Port0 Port1 Port0 Port1 Port0 Port1 Timer5 Port0 Port1 Port0 Port1 Port0 Port1 Timer6 Port0 Port1 Port0 Port1 Port0 Port1 Timer7 Port0 Port1 Port0 Port1 Port0 Port1 Timer8 Port0 Port1 Port0 Port1 Port0 Port1 GPIO0 Port0 Port1 Port0 Port1 Port0 Port1 GPIO1 Port0 Port1 Port0 Port1 Port0 Port1 MMC/SD0/SDIO Port0 Port1 Port0 Port1 Port0 Port1 MMC/SD1/SDIO Port0 Port1 Port0 Port1 Port0 Port1 MMC/SD2/SDIO Port0 Port1 Port0 Port1 Port0 Port1 WDT0 Port0 Port1 Port0 Port1 Port0 Port1 RTC Port0 Port1 Port0 Port1 Port0 Port1 SmartReflex0 Port0 SmartReflex1 Port0 Mailbox Port0 Spinlock Port0 HDVPSS Port0 Port1 Port0 Port1 Port0 Port1 PLLSS Port0 Port1 Control/Top Regs (Control Port0 Port1 Module) PRCM Port0 Port1 ELM Port0 Port1 (1) X, Port0, Port1 = Connection exists. Copyright © 2013, Texas Instruments Incorporated System Interconnect 121 Submit Documentation Feedback Product Folder Links: DM385 DM388 |
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