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AS0260CSSC28SUD20 数据表(PDF) 14 Page - ON Semiconductor |
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AS0260CSSC28SUD20 数据表(HTML) 14 Page - ON Semiconductor |
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14 / 83 page ![]() AS0260 DS Rev. G Pub. 5/15 EN 14 ©Semiconductor Components Industries, LLC, 2015. AS0260: 1/6-Inch 1080P High-Definition (HD) System-On-A-Chip (SOC) Digi- tal Image Sensor Image Data Output Interface The user can select either the 8-bit parallel or serial MIPI output to transmit the sensor image data to the host system. Only one of the output modes can be used at any time. The AS0260 has an output FIFO to retain a constant pixel output clock. Parallel Port The AS0260 image data is read out in a progressive scan mode. Valid image data is surrounded by horizontal blanking and vertical blanking. The amount of horizontal blanking and vertical blanking are programmable. AS0260 output data is synchronized with the PIXCLK output. When LV is HIGH, one pixel value is output on the 8-bit DOUT port every TWO PIXCLK periods as shown in Figure 7. PIXCLK is continuously running, even during the blanking period. PIXCLK phase can be varied by 50 percent, controlled using a register. Figure 7: Pixel Data Timing Example Note: Shown is 10-bit Bayer data in 8 + 2 mode. Figure 8: Row Timing, FV, and LV Signals Notes: 1. P: Frame start and end blanking time. 2. A: Active data time. 3. Q: Horizontal blanking time. MIPI Port The MIPI output implements a serial differential sub-LVDS transmitter capable of up to 1536 Mbps (768 Mbps/lane). It supports multiple formats, error checking, and custom short packets. When the sensor is in the hardware standby system state or in the software standby system state, the MIPI signals (CLK_P, CLK_N, DATA_P, DATA_N, DATA_2P, DATA_2N) indicate ultra low power state (ULPS) corresponding to (nominal) 0V levels being driven on CLK_P, CLK_N, DATA_P, DATA_N, DATA_2P, and DATA_2N. This is equivalent to signaling code LP-00. P0 (9:2) P0 (1:0) P1 (9:2) P1 (1:0) P2 (9:2) Pn-1 (9:2) Pn (9:2) LINE_VALID PIXCLK DOUT[7:0] Blanking Blanking Valid Data Pn-1 (1:0) Pn (1:0) FRAME_VALID LINE_VALID Data Modes P1 A2 Q3 AQ A P |
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