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AS0260CSSC28SUD20 数据表(PDF) 23 Page - ON Semiconductor |
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AS0260CSSC28SUD20 数据表(HTML) 23 Page - ON Semiconductor |
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23 / 83 page  AS0260 DS Rev. G Pub. 5/15 EN 23 ©Semiconductor Components Industries, LLC, 2015. AS0260: 1/6-Inch 1080P High-Definition (HD) System-On-A-Chip (SOC) Digi- tal Image Sensor Binning The AS0260 sensor core supports 2 x 2 binning. Binning has many of the same character- istics as subsampling but because it gathers image data from all pixels in the active window (rather than a subset of them), it achieves superior image quality and avoids the aliasing artifacts that can be a characteristic side effect of subsampling. Binning is enabled by selecting the appropriate subsampling settings. Subsampling may require sensor window size adjustment when binning is enabled. The effect of binning is shown in Figure 19 on page 18. Figure 19: Pixel Readout (column and row binning) PLL A PLL is provided to create the required PIXCLK from the input EXTCLK. The PLL is programmed through variable settings. Y incrementing X incrementing |
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