AS0260CSSC28SUD20 datasheet(15/83 Pages) ONSEMI

15 / 83 page

AS0260 DS Rev. G Pub. 5/15 EN

©Semiconductor Components Industries, LLC, 2015.

AS0260: 1/6-Inch 1080P High-Definition (HD) System-On-A-Chip (SOC) Digi-

tal Image Sensor

When the sensor enters the streaming system state, the interface goes through the

following transitions:

1. After the PLL has locked and the bias generator for the MIPI drivers has stabilized, the

MIPI interface transitions from the ULPS state to the ULPS-exit state (signaling code

LP–10).

2. After a delay (TWAKEUP), the MIPI interface transitions from the ULPS-exit state to

the TX-stop state (signaling code LP–11).

3. After a short period of time (the programmed integration time plus a fixed overhead),

frames of pixel data start to be transmitted on the MIPI interface. Each frame of pixel

data is transmitted as a number of high-speed packets. The transition from the

TX-stop state to the high-speed signaling states occurs in accordance with the MIPI

specifications. Between high-speed packets and between frames, the MIPI interface

idles in the TX-stop state. The transition from the high-speed signaling states and the

TX-stop state takes place in accordance with the MIPI specifications.

4. If the sensor is reset, any frame in progress is aborted immediately and the MIPI sig-

nals switch to indicate the ULPS.

5. If the sensor is taken out of the streaming system state and reset_register[4] = 1

(standby end-of-frame), any frame in progress is completed and the MIPI signals

switch to indicate the ULPS.

If the sensor is taken out of the streaming system state and reset_register[4] = 0 (standby

end-of-frame), any frame in progress is aborted as follows:

1. Any long packet in transmission is completed.

2. The end of frame short packet is transmitted.

After the frame has been aborted, the MIPI signals switch to indicate the ULPS.

AS0260CSSC28SUD20 数据表(PDF) 15 Page - ON Semiconductor