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EM346-RTR 数据表(PDF) 123 Page - Silicon Laboratories |
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EM346-RTR 数据表(HTML) 123 Page - Silicon Laboratories |
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123 / 142 page ![]() EM346 124 Rev 1.0 27 PA5 I/O Digital I/O PTI_DATA O Data signal of Packet Trace Interface (PTI) Disable trace interface in ARM core Enable PTI in Ember software Select alternate output function with GPIO_PACFGH[7:4] nBOOTMODE I Activate FIB monitor instead of main program or bootloader when coming out of reset. Signal is active during and immediately after a reset on nRESET. See "7.5. Boot Configuration" on page 51. TRACEDATA3 O Synchronous CPU trace data bit 3 Select 4-wire synchronous trace interface in ARM core Enable trace interface in ARM core Select alternate output function with GPIO_PACFGH[7:4] 28 VDD_PADS Power Pads supply (2.1–3.6 V) 29 NC Do not connect 30 PB1 I/O Digital I/O SC1MISO O SPI slave data out of Serial Controller 1 Select SPI with SC1_MODE Select slave with SC1_SPICR Select alternate output function with GPIO_PBCFGL[7:4] SC1TXD O UART transmit data of Serial Controller 1 Select UART with SC1_MODE Select alternate output function with GPIO_PBCFGL[7:4] 31 PB2 I/O Digital I/O SC1MOSI I SPI slave data in of Serial Controller 1 Select SPI with SC1_MODE Select slave with SC1_SPICR SC1RXD I UART receive data of Serial Controller 1 Select UART with SC1_MODE 32 SWCLK I/O Serial Wire clock input/output with debugger Selected when in Serial Wire mode (see JTMS description, Pin 35) JTCK I JTAG clock input from debugger Selected when in JTAG mode (default mode, see JTMS description, Pin 35) Internal pull-down is enabled Table 17.1. EM346 Pin Descriptions (Continued) Pin # Signal Direction Description |
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