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STM32F479AI 数据表(PDF) 186 Page - STMicroelectronics |
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STM32F479AI 数据表(HTML) 186 Page - STMicroelectronics |
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186 / 208 page  Electrical characteristics STM32F479xx 186/208 DocID028010 Rev 2 Figure 77. SD default mode Table 111. Dynamic characteristics: SD / MMC characteristics, VDD = 2.7 to 3.6 V(1) Symbol Parameter Conditions Min Typ Max Unit fPP Clock frequency in data transfer mode - 0 - 50 MHz - SDIO_CK/fPCLK2 frequency ratio - - - 8/3 - tW(CKL) Clock low time fpp =50 MHz 9.5 10.5 - ns tW(CKH) Clock high time 8.5 9.5 - CMD, D inputs (referenced to CK) in MMC and SD HS mode tISU Input setup time HS fpp =50 MHz 2.0 - - ns tIH Input hold time HS 2.0 - - CMD, D outputs (referenced to CK) in MMC and SD HS mode tOV Output valid time HS fpp =50 MHz -13 13.5 ns tOH Output hold time HS 12.5 - - CMD, D inputs (referenced to CK) in SD default mode tISUD Input setup time SD fpp =25 MHz 2.0 - - ns tIHD Input hold time SD 2.5 - - CMD, D outputs (referenced to CK) in SD default mode tOVD Output valid default time SD fpp =25 MHz -1.5 2.0 ns tOHD Output hold default time SD 1.0 - - 1. Guaranteed based on test during characterization. |
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