7267-042313-

6

asynchronously with respect to XA and XB inputs. In

non-quadrature mode the XCNTR/XABG input is

unconditionally set to the asynchronous mode

XLCNTR/XLOL/ (pin 19). Input. This is the x-axis

functional equivalent of the YCLNTR/YLOL input. The

associated x-axis reference registers are: XCNTR, XOL,

XIOR and XIDR

XA (pin 20), XB (pin 21). Inputs. These are the A and B

count inputs in the x-axis. These inputs can be

configured to function either in quadrature mode or in

non-quadrature mode. The configuration is made with

the XCMR register. In quadrature mode, XA and XB

clocks are normally supplied from incremental encoders

with the two clocks being 90º out of phase. When XA

leads XB in phase, the counter (XCNTR) counts up;

when XA lags XB, the XCNTR counts down.

In non-quadrature mode XA functions as the count input

and XB as the count direction control input. When XB is

high positive transitions at the XA input causes the

XCNTR to count up. Conversely, when XB is low

positive transitions at the XA input causes the XCNTR to

count down.

In quadrature mode XA and XB inputs are sampled for

logic level validation and noise discrimination with an

internal filter clock derived from the FCK input clock. In

non-quadrature mode XA and XB inputs are not sampled

and the count clocks are applied directly to the XCNTR

count input bypassing the filter circuit.

XFLG1 (pin 22). Output. Programmable output in the x-

axis to function as CARRY or BORROW or COMPARE

or INDX. The configuration is made with the XIOR

register. The output is generated as a low pulse when

the selected event takes place CARRY or BORROW

output is generated when the XCNTR overflows or

underflows respectively. INDX output is generated when

the designated INDEX input goes into active level.

COMPARE output is generated at XCNTR = XPR. An

exception is made in the

modulo-N and range-limit

modes In these modes the COMPARE output is

generated at XCNTR = XPR only in the

up count

direction.

XFLG2 (pin 23). Output. Programmable output in the x-

axis to function as BORROW or UP/DN or E. The

BORROW output is generated as a low pulse when the

XCNTR underflows. When configured as UP/DN the

output dynamically goes high when the XCNTR is

counting up and low when it is counting down. When

configured as E the output sets to 1 whenever the

Once set it remains set until the FLAG register bit-4 is

reset.

YA (pin25), YB (pin 24). Inputs. These are the y-axis

functional equivalents of the XA and XB inputs. They

operate on the YCNTR and are configured with the

YCMR register.

YFLG2 (pin26), Output. This is the y-axis functional

equivalent of XFLG2 .

YFLG1 (pin27), Output. This is the y-axis functional

equivalent of XFLG1

YRCNTR/YABG (pin 28). Input. This is the y-axis

functional equivalent of the XRCNTR/XABG input. The

associated y-axis reference registers are: YCNTR, YOL,

YIOR and YIDR .

uC

CLK

Pn<0:7 >

Px<0:3>

LS7267

FCK

D<0:7>

WR/

RD/

CS/

X/Y

A

B

RCNTR/

Encoder

INDEX

A

B

A Typical Application