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STA016 数据表(PDF) 14 Page - STMicroelectronics

部件名 STA016
功能描述  MPEG 2.5 LAYER III AUDIO DECODER SUPPORTING CD-ROM CAPABILITY
PDF  43 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STA016 数据表(HTML) 14 Page - STMicroelectronics

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STA016A
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6
REGISTER DESCRIPTION
6.1 VERSION registers description
6.1.1
VERSION :
Address : 0x00 (0)
Type : RO - DWT
Software Reset : 0x10
Hardware Reset : 0x10
Description :
The VERSION register is Read-only and it is used to
identify the IC on the application board.
6.1.2
IDENT :
Address : 0x01 (1)
Type : RO - DWT
Software Reset : 0xAC
Hardware Reset : 0xAC
Description :
IDENT is a read-only register and it is used to identify
the IC on an application board. IDENT always has the
value 0xAC.
6.1.3
SOFT_VERSION :
Address : 0xD3 (211)
Type : RO - DWT
Software Reset : X
Description :
The SOFT_VERSION register is Read-only and it is
used to identify the software running on the IC.
6.2 PLL_AUDIO_CONFIGURATION registers
description
6.2.1
PLL_AUDIO_PEL_192 :
Address : 0xDC (220)
Type : RW - DEC
Software Reset : 58
Description :
This register must contain a PEL value that enables
the audio PLL to generate a frequency of ofact*192
kHz for the PCMCK.See table 1, 2 & 3.
ofact is the oversampling factor needed by the DAC
(ofac==246 or ofac==384).
Default value at soft reset assume :
–ofact == 256
– external crystal provide a CRYCK running at
14.31818 MHz
6.2.2
PLL_AUDIO_PEH_192 :
Address : 0xDD (221)
Type : RW - DEC
Software Reset : 187
Description :
This register must contain a PEH value that enables
the audio PLL to generate a frequency of ofact*192
kHz for the PCMCK.See table 1, 2 & 3.
Default value at soft reset assume :
– ofact == 256
– external crystal provide a CRYCK running at
14.31818 MHz
6.2.3
PLL_AUDIO_NDIV_192 :
Address : 0xDE (222)
Type : RW - DEC
Software Reset : 0
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