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STA016 数据表(PDF) 35 Page - STMicroelectronics |
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STA016 数据表(HTML) 35 Page - STMicroelectronics |
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35 / 43 page  35/43 STA016A Table 37. values to configure audio PLL for ofact==384 This table give values to configure the audio PLL according CRYCK so that to generate a PCMCK == 384*SF. Table 38. values to configure audio PLL for ofact==512. This table give values to configure the audio PLL according CRYCK so that to generate a PCMCK == 512*SF. Register CRYCK in MHz 10 CRYCK in MHz 14.31818 CRYCK in MHz 14.7456 PLL_AUDIO_PEL_192 224 108 0 PLL_AUDIO_PEH_192 190 76 0 PLL_AUDIO_NDIV_192 0 0 0 PLL_AUDIO_XDIV_192 1 1 1 PLL_AUDIO_MDIV_192 13 9 9 PLL_AUDIO_PEL_176 42 54 0 PLL_AUDIO_PEH_176 140 118 48 PLL_AUDIO_NDIV_176 0 0 0 PLL_AUDIO_XDIV_176 1 1 1 PLL_AUDIO_MDIV_176 12 8 8 Register CRYCK in MHz 10 CRYCK in MHz 14.31818 CRYCK in MHz 14.7456 PLL_AUDIO_PEL_192 42 58 85 PLL_AUDIO_PEH_192 169 187 85 PLL_AUDIO_NDIV_192 0 0 0 PLL_AUDIO_XDIV_192 1 0 1 PLL_AUDIO_MDIV_192 18 5 12 PLL_AUDIO_PEL_176 56 157 0 PLL_AUDIO_PEH_176 16 157 64 PLL_AUDIO_NDIV_176 0 0 0 PLL_AUDIO_XDIV_176 1 1 1 PLL_AUDIO_MDIV_176 17 11 11 |
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