Preliminary Technical Data

AD7938/AD7939

PARALLEL INTERFACE

The AD7938/AD7939 have a flexible, high speed, parallel

interface. This interface is 12-bits (AD7938) or 10-bits

(AD7939) wide and is capable of operating in either word (W/B

tied high) or byte (W/B tied low) mode. The CONVST signal is

used to initiate conversions on the ADC, and when operating in

auto-shutdown or auto-standby mode, it is used to power up the

device.

A falling edge on the CONVST signal is used to initiate

conversions and it also puts the ADC track-and-hold into track.

Once the CONVST signal goes low, the BUSY signal goes high

for the duration of the conversion. In between conversions,

conversion is aborted and the track-and-hold goes back into

track. At the end of the conversion, BUSY goes low and can be

used to activate an interrupt service routine. The CS and RD

lines are then activated in parallel to read the 12- or 10- bits of

conversion data. When power supplies are first applied to the

device, a rising edge on CONVST puts the track-and-hold into

track. The acquisition time of 135 ns minimum must be allowed

before CONVST is brought low to initiate a conversion. The

ADC then goes into hold on the falling edge of CONVST and

). When operating the device in auto-shutdown or

auto-standby mode, where the ADC powers down at the end of

each conversion, a rising edge on the CONVST signal is used to

power up the device.

Figure 38

Figure 38. AD7938/AD7939 Parallel Interface—Conversion and Read Cycle in Word Mode (W/B = 1)

12

3

4

5

12

13

14

B

A

DATA

DATA

OLD DATA

DB0 TO DB11

DB0 TO DB11

RD

CS

INTERNAL

TRACK/HOLD

BUSY

CLKIN

CONVST

THREE-STATE

THREE-STATE

WITH CS AND RD TIED LOW

Rev. PrN | Page 25 of 32