数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

DP8390DV 数据表(PDF) 54 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 DP8390DV
功能描述  NIC Network Interface Controller
PDF  56 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

DP8390DV 数据表(HTML) 54 Page - National Semiconductor (TI)

Back Button DP8390DV Datasheet HTML 48Page - National Semiconductor (TI) DP8390DV Datasheet HTML 49Page - National Semiconductor (TI) DP8390DV Datasheet HTML 50Page - National Semiconductor (TI) DP8390DV Datasheet HTML 51Page - National Semiconductor (TI) DP8390DV Datasheet HTML 52Page - National Semiconductor (TI) DP8390DV Datasheet HTML 53Page - National Semiconductor (TI) DP8390DV Datasheet HTML 54Page - National Semiconductor (TI) DP8390DV Datasheet HTML 55Page - National Semiconductor (TI) DP8390DV Datasheet HTML 56Page - National Semiconductor (TI)  
Zoom Inzoom in Zoom Outzoom out
 54 / 56 page
background image
150 Switching Characteristics (Continued)
Serial TimingTransmit (Collision)
TLF8582 – 92
Symbol
Parameter
Min
Max
Units
tcolw
Collision Detect Width
2
txcyc
cycles
tcdj
Delay from Collision to First
8
txcyc
Bit of Jam (Note 1)
cycles
tjam
Jam Period (Note 2)
32
txcyc
cycles
Note 1
The NIC must synchronize to collision detect If the NIC is in the middle of serializing a byte of data the remainder of the byte will be serialized Thus the jam
pattern will start anywhere from 1 to 8 TXC cycles after COL is asserted
Note 2
The NIC always issues 32 bits of jam The jam is all 1’s data
Reset Timing
TLF8582 – 93
Symbol
Parameter
Min
Max
Units
rstw
Reset Pulse Width (Note 1)
8
BSCK Cycles or TXC Cycles
(Note 2)
Note 1
The RESET pulse requires that BSCK and TXC be stable On power up RESET should not be raised until BSCK and TXC have become stable Several
registers are affected by RESET Consult the register descriptions for details
Note 2
The slower of BSCK or TXC clocks will determine the minimum time for the RESET signal to be low
If BSCK k TXC then RESET e 8 c BSCK
If TXC k BSCK then RESET e 8 c TXC
54



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com