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TMS320DM640 数据表(PDF) 45 Page - Texas Instruments |
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TMS320DM640 数据表(HTML) 45 Page - Texas Instruments |
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45 / 171 page  Pin Assignments 45 June 2003 − Revised August 2004 SPRS222C Table 1−6. Terminal Functions (Continued) SIGNAL DESCRIPTION IPD/ IPU‡ TYPE† NAME DESCRIPTION IPD/ IPU‡ TYPE† DM640 DM641 HOST-PORT INTERFACE (HPI) [DM641 ONLY] (CONTINUED) HD15 T3 — HD14 U1 — HD13 U3 — HD12 U2 — HD11 U4 — HD10 V1 — Host-port data (I/O/Z) [DM641 Only] HD9 V3 — Host-port data (I/O/Z) [DM641 Only] As HPI data bus HD8 V2 — I/O/Z As HPI data bus • Used for transfer of data, address, and control HD7 W2 — I/O/Z • Used for transfer of data, address, and control HD6 W4 — For proper DM641 device operation, the HD5 pin at device reset must be pulldown via a 10-k resistor. HD5 Y1 — For proper DM641 device operation, the HD5 pin at device reset must be pulldown via a 10-k Ω resistor. HD4 W3 — HD3 Y2 — HD2 Y4 — HD1 AA1 — HD0 Y3 — EMIFA (32-BIT) − CONTROL SIGNALS COMMON TO ALL TYPES OF MEMORY ACE3 L26 L26 O/Z IPU EMIFA memory space enables ACE2 K23 K23 O/Z IPU EMIFA memory space enables • Enabled by bits 28 through 31 of the word address ACE1 K24 K24 O/Z IPU • Enabled by bits 28 through 31 of the word address • Only one pin is asserted during any external data access ACE0 K25 K25 O/Z IPU • Only one pin is asserted during any external data access ABE3 M25 M25 O/Z IPU EMIFA byte-enable control Decoded from the low-order address bits. The number of address bits ABE2 M26 M26 O/Z IPU EMIFA byte-enable control • Decoded from the low-order address bits. The number of address bits or byte enables used depends on the width of external memory. ABE1 L23 L23 O/Z IPU or byte enables used depends on the width of external memory. • Byte-write enables for most types of memory • Can be directly connected to SDRAM read and write mask ABE0 L24 L24 O/Z IPU • Can be directly connected to SDRAM read and write mask signal (SDQM) APDT M22 M22 O/Z IPU EMIFA peripheral data transfer, allows direct transfer between external peripherals † I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground ‡ IPD = Internal pulldown, IPU = Internal pullup. (These IPD/IPU signal pins feature a 30-kΩ IPD or IPU resistor. To pull up a signal to the opposite supply rail, a 1-k Ω resistor should be used.) § These pins are multiplexed pins. For more details, see the Device Configurations section of this data sheet. |
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