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PCF88331 数据表(PDF) 45 Page - NXP Semiconductors |
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PCF88331 数据表(HTML) 45 Page - NXP Semiconductors |
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45 / 112 page ![]() 2003 Feb 14 45 Philips Semiconductors Objective specification STN RGB - 132 × 132 × 3 driver PCF8833 Table 45 Interface formats Notes 1. PCF8833 is switched into 256 colour mode, 256 colours are mapped to the 4 kbyte RAM with a LUT; see Section 6.2.22. 2. PCF8833 is switched into 4 kbyte colour mode, which is also the reset state. 3. PCF8833 is switched into 64 kbyte colour mode, which is achieved by means of dithering. 6.2.31 SET VOP The set VOP command (SETVOP) is used to program the optimum LCD supply voltage VLCD. The reset state of VPR[8:0] is 257DEC (13.88 V). The optimum LCD supply voltage can be calculated as explained in Section 6.2.43. The VOP value is programmed via the VPR register. Besides the VPR register the VOP value can be calibrated by means of OTP cells or changed with the VCON register (see Fig.23). The generated VLCD can be calculated with equation (1). Figure 24 is the graphical equivalent to equation (1). (1) Where: • a is a fixed constant value; see Table 47 • b is a fixed constant value; see Table 47 • VPR[8:0] is the programmed VOP value; the programming range for VPR[8:0] is 5 to 410 (19AH) • MMVOPCAL[5:0] is the value of the offset stored in the OTP cells in twos complement format; see Section 15.1 • VCON[6:0] is the set contrast value which can be set via the interface and is in twos complement format; see Section 6.2.16. The VOP[8:0] value must be in the VLCD programming range as shown in Fig.24. Evaluating equation (1), values outside of the programming range indicated in Fig.24 may result. Calculated values below 0 will be mapped to VOP = 0; resulting VOP values higher than 445 will be mapped to VOP = 445. An overview of the complete programming range of VLCD can be found in Section 15.1. As the programming range for the internally generated VLCD allows values above the maximum allowed VLCD (20 V) the user has to ensure, while setting the VPR register and selecting the temperature compensation, that under all conditions and including all tolerances the VLCD remains below 20 V. P2 P1 P0 INTERFACE FORMATS 0 0 0 no action 0 0 1 no action 0 1 0 8-bit/pixel(1) 0 1 1 12-bit/pixel(2) 1 0 0 no action 1 0 1 16-bit/pixel(3) 1 1 0 no action 1 1 1 no action V LCD a MMVOPCAL 5:0 [] VCON 6:0 [] V PR 8:0 [] ++ 〈 〉 b × + = Table 46 Set VOP register bits; note 1 Note 1. X = don’t care. D/C D7D6D5D4D3D2D1D0 DEFAULT 010110000 B0H 1 XXXX VPR8 VPR7 VPR6 VPR5 08H 1 XXX VPR4 VPR3 VPR2 VPR1 VPR0 01H |
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