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PCF88331 数据表(PDF) 19 Page - NXP Semiconductors |
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PCF88331 数据表(HTML) 19 Page - NXP Semiconductors |
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19 / 112 page  2003 Feb 14 19 Philips Semiconductors Objective specification STN RGB - 132 × 132 × 3 driver PCF8833 Table 15 Display identification bits description BIT BIT DESCRIPTION STATUS D31 booster voltage status logic 1 when BSTRON is selected and when the LCD supply generation circuits are ready logic 0 when BSTROFF is selected or when the LCD supply generation circuits are not ready D30 Y address order logic 1 when MY = 1 logic 0 when MY = 0 D29 X address order logic 1 when MX = 1 logic 0 when MX = 0 D28 vertical/horizontal addressing mode logic 1 when V = 1 logic 0 when V = 0 D27 line address order logic 1 when LAO = 1 logic 0 when LAO = 0 D26 RGB/BGR order logic 1 when RGB = 1 logic 0 when RGB = 0 D[25:23] no function, but can be read D[25:23] = 000 D[22:20] interface pixel format see Section 6.2.30 P2 = D22; P1 = D21 and P0 = D20 D19 Idle mode logic 1 when IDMON is selected logic 0 when IDMOFF is selected D18 Partial mode logic 1 when PTLON is selected logic 0 otherwise D17 Sleep_IN/OUT logic 1 when Sleep_OUT is selected logic 0 when Sleep_IN is selected D16 normal Display mode logic 1 when NORON is selected logic 0 otherwise D15 vertical Scroll mode logic 1 when SEP is selected logic 0 otherwise D14 no function; but can be read D14 = 0 D13 display inversion logic 1 when INVON is selected logic 0 when INVOFF is selected D12 all pixels on logic 1 when DAL is selected logic 0 otherwise D11 all pixels off logic 1 when DALO is selected logic 0 otherwise D10 display on/off logic 1 when DISPON is selected logic 0 when DISPOFF is selected D9 tearing effect line on/off logic 1 when TEON is selected logic 0 when TEOFF is selected D[8:0] no function; but can be read D[8:0] = 0:0000:0000 |
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