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PCF88331 数据表(PDF) 6 Page - NXP Semiconductors |
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PCF88331 数据表(HTML) 6 Page - NXP Semiconductors |
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6 / 112 page  2003 Feb 14 6 Philips Semiconductors Objective specification STN RGB - 132 × 132 × 3 driver PCF8833 OSC 555 I oscillator input or external oscillator resistor connection; when the on-chip oscillator is used this input must be connected to VDD1; an external clock signal, if used, is connected to this input and the internal oscillator must be switched off with a software command; if the oscillator and external clock are all inhibited by connecting pin OSC to VSS1, the display is not clocked and may be left in a DC state; to avoid this the chip should always be put into Power-down mode before stopping the clock. VDD(tieoff) 556 O can be used to tie inputs to VDD1 VOTP(drain) 557 to 564 PS supply voltage for OTP programming (write voltage), in Application mode must be tied to VSS1 or left open-circuit VOTP(gate) 565 to 572 PS supply voltage for OTP programming, in Application mode must be tied to VSS1 or left open-circuit T6 573 I test pin; not accessible to user; must be connected to VSS1 T5 574 I test pin; not accessible to user; must be connected to VSS1 T4 575 O test pin; not accessible to user; must be left open-circuit T3 576 O test pin; not accessible to user; must be left open-circuit T2 577 I/O test pin; not accessible to user; must be also connected to VSS1 T1 578 I/O test pin; not accessible to user; must be also connected to VSS1 VSS(tieoff) 579 O can be used to tie inputs to VSS1 VSS(tieoff) 624 O can be used to tie inputs to VSS1 T7 625 I/O test pin; not accessible to user; must be connected to VSS1 C1+ 626 to 631 I positive input pump capacitor voltage multiplier 1 C1 − 632 to 637 I negative input pump capacitor voltage multiplier 1 C2+ 638 to 643 I positive input pump capacitor voltage multiplier 1 C2 − 644 to 649 I negative input pump capacitor voltage multiplier 1 C3+ 650 to 655 I positive input pump capacitor voltage multiplier 1 C3 − 656 to 661 I negative input pump capacitor voltage multiplier 1 C4+ 662 to 667 I positive input pump capacitor voltage multiplier 1 C4 − 668 to 673 I negative input pump capacitor voltage multiplier 1 VLCDOUT1 674 to 683 O output voltage multiplier 1 VLCDIN1 684 to 690 PS LCD supply input voltage 1 C5+ 691 to 696 I positive input pump capacitor voltage multiplier 2 C5 − 697 to 702 I negative input pump capacitor voltage multiplier 2 VLCDOUT2 703 to 711 O output voltage multiplier 2 VLCDSENSE 712 I voltage multiplier regulation input; must be connected to VLCDOUT2 VLCDIN2 713 to 719 PS LCD supply input voltage 2 V2L 720, 721 O LCD bias level V1L 722, 723 O LCD bias level VC 724 to 728 O LCD bias level V1H 729, 730 O LCD bias level SYMBOL PAD TYPE DESCRIPTION |
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