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PCF88331 数据表(PDF) 14 Page - NXP Semiconductors |
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PCF88331 数据表(HTML) 14 Page - NXP Semiconductors |
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14 / 112 page ![]() 2003 Feb 14 14 Philips Semiconductors Objective specification STN RGB - 132 × 132 × 3 driver PCF8833 Notes 1. These values can be set by the module maker. If the factory defaults OTP bit EFD have been set, the value cannot be changed via the interface. Otherwise, the OTP data will be used if SFD is set to logic 1, which is the reset state. 2. Calibration mode may not be entered if the SEAL bit has been set. Programming is only possible when in Calibration mode. xs[7:0] x address start 2DEC xe[7:0] x address end 129DEC ys[7:0] y address start 2DEC ye[7:0] y address end 129DEC RGBSET 256 to 4 kbyte colour LUT see Section 6.2.22 AA1S[7:0] partial area start address 0DEC AA1E[7:0] partial area end address 31DEC TF[7:0] top fixed area 0DEC SA[7:0] scroll area 130DEC BF[7:0] bottom fixed area 0DEC SEP[7:0] scroll entry point 0DEC P[2:0] interface pixel format is 12-bit/pixel 011 VPR[8:0] programming of VLCD2 voltage; note 1 257DEC S[1:0] charge pump multiplication factor; note 1 11 SLA[2:0] select slope for segment A; note 1 100 SLB[2:0] select slope for segment B; note 1 011 SLC[2:0] select slope for segment C; note 1 101 SLD[2:0] select slope for segment D; note 1 111 DFA[6:0] frame frequency for segment A is 80 Hz; note 1 56DEC DFB[6:0] frame frequency for segment B is 130 Hz; note 1 35DEC DFC[6:0] frame frequency for segment C is 150 Hz; note 1 30DEC DFD[6:0] frame frequency for segment D is 180 Hz; note 1 25DEC DF8[6:0] frame frequency for 8-colour mode is 130 Hz; note 1 35DEC VB[3:0] bias system is F/Gmax = 2.5; note 1 1011 NLI[7:0] inversion is after 19 time slots (76 rows in Full mode); note 1 19DEC VCON[6:0] no contrast setting is set (twos complement number); note 1 0DEC SFD OTP programmed data is used; note 1 1 CALMM not in Calibration mode 0 OPE disable OTP programming voltage; note 2 0 ORA[2:0] OTP row address selection 000 COMMAND DESCRIPTION RESET STATE |
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