TPS51116-EP

SLUSB52A – OCTOBER 2012 – REVISED NOVEMBER 2012

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

ORDERABLE

TOP-SIDE

PACKAGE

VID NUMBER

PART NUMBER

MARKING

TPS51116MPWPREP

V62/12602-01XE

–55°C to 125°C

51116M

TPS51116MPWPEP

V62/12602-01XE-T

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

(2)

With Cu NIPDAU lead/ball finish

ABSOLUTE MAXIMUM RATINGS

(1)

over operating free-air temperature range unless otherwise noted

MIN

MAX

UNIT

VBST

–0.3

36

VBST wrt LL

–0.3

6

Input voltage range

V

CS, MODE, S3, S5, VTTSNS, VDDQSNS, V5IN, VLDOIN, VDDQSET

–0.3

6

PGND, VTTGND

–0.3

0.3

DRVH

–1.0

36

LL

–1.0

30

Output voltage range

V

LL, pulse width < 20 ns

–5

30

COMP, DRVL, PGOOD, VTT, VTTREF

–0.3

6

Maximum junction temperature

150

°C

Storage temperature

–65

150

(1)

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating

conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage

values are with respect to the network ground terminal unless otherwise noted.

2

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