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TPS51116MPWPREP 数据表(PDF) 8 Page - Texas Instruments |
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TPS51116MPWPREP 数据表(HTML) 8 Page - Texas Instruments |
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8 / 38 page ![]() 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VLDOIN VTT VTTGND VTTSNS GND MODE VTTREF COMP VDDQSNS VDDQSET VBST DRVH LL DRVL PGND CS V5IN PGOOD S5 S3 PWP PACKAGE (TOP VIEW) TPS51116-EP SLUSB52A – OCTOBER 2012 – REVISED NOVEMBER 2012 www.ti.com DEVICE INFORMATION TERMINAL FUNCTIONS TERMINAL NO. I/O DESCRIPTION NAME PWP Output of the transconductance amplifier for phase compensation. Connect to V5IN to disable gm COMP 8 I/O amplifier and use D-CAP™ mode. Current sense comparator input (-) for resistor current sense scheme. Or overcurrent trip voltage CS 15 I/O setting input for RDS(on) current sense scheme if connected to V5IN through the voltage setting resistor. DRVH 19 O Switching (top) MOSFET gate drive output. DRVL 17 O Rectifying (bottom) MOSFET gate drive output. GND 5 - Signal ground. Connect to minus terminal of the VTT LDO output capacitor. Switching (top) MOSFET gate driver return. Current sense comparator input (-) for RDS(on) current LL 18 I/O sense. MODE 6 I Discharge mode setting pin. See VDDQ and VTT Discharge Control section. Ground for rectifying (bottom) MOSFET gate driver. Also current sense comparator input(+) and PGND 16 – ground for powergood circuit. Powergood signal open drain output, In HIGH state when VDDQ output voltage is within the target PGOOD 13 O range. S3 11 I S3 signal input. S5 12 I S5 signal input. V5IN 14 I 5-V power supply input for internal circuits and MOSFET gate drivers. VBST 20 I/O Switching (top) MOSFET driver bootstrap voltage input. VDDQSET 10 I VDDQ output voltage setting pin. See VDDQ Output Voltage Selection section. VDDQ reference input for VTT and VTTREF. Power supply for the VTTREF. Discharge current VDDQSNS 9 I/O sinking terminal for VDDQ Non-tracking discharge. Output voltage feedback input for VDDQ output if VDDQSET pin is connected to V5IN or GND. VLDOIN 1 I Power supply for the VTT LDO. VTT 2 O Power output for the VTT LDO. VTTGND 3 – Power ground output for the VTT LDO. VTTREF 7 O VTTREF buffered reference output. VTTSNS 4 I Voltage sense input for the VTT LDO. Connect to plus terminal of the VTT LDO output capacitor. 8 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: TPS51116-EP |
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