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AP0100CS 数据表(PDF) 13 Page - ON Semiconductor

部件名 AP0100CS
功能描述  High-Dynamic Range (HDR) Image Signal Processor (ISP)
PDF  73 Pages
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制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor

AP0100CS 数据表(HTML) 13 Page - ON Semiconductor

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Table 7:
Output States
Name
Hardware States
Firmware States
Notes
Reset State
Default State
Hard Standby
Soft Standby
Streaming
Idle
EXTCLK
(clock running
or stopped)
(clock running)
(clock running
or stopped)
(clock running) (clock running) (clock running) Input
XTAL
n/a
n/a
n/a
n/a
n/a
n/a
Input
RESET_BAR
(asserted)
(negated)
(negated)
(negated)
(negated)
(negated)
Input
SCLK
n/a
n/a
(clock running
or stopped)
(clock running
or stopped)
(clock running
or stopped)
(clock running
or stopped)
Input. Must always be driven to a valid logic
level
SDATA
High-
impedance
High-
impedance
High-
impedance
High-
impedance
Input/Output. A valid logic level should be
established by pull-up
SADDR
n/a
n/a
n/a
n/a
n/a
n/a
Input. Must always be driven to a valid logic
level
FRAME_SYNC
n/a
n/a
n/a
n/a
n/a
n/a
Input. Must always be driven to a valid logic
level
STANDBY
n/a
(negated)
(asserted)
(negated)
(negated)
(negated)
Input. Must always be driven to a valid logic
level
EXT_REG
n/a
n/a
n/a
n/a
n/a
n/a
Input. Must always be driven to a valid logic
level
ENLDO
n/a
n/an/a
n/an/a
n/aInput. Must be tied to VDD_REG or GND
SPI_SCLK
High-
impedance
driven, logic 0
driven, logic 0
driven, logic 0
Output
SPI_SDI
Internal pull-
up enabled
Internal pull-
up enabled
Internal pull-
up enabled
internal pull-
up enabled
Input. Internal pull-up permanently
enabled.
SPI_SDO
High-
impedance
driven, logic 0
driven, logic 0
driven, logic 0
Output
SPI_CS_BAR
High-
impedance
driven, logic 1
driven, logic 1
driven, logic 1
Output
EXT_CLK_OUT driven, logic 0
driven, logic 0
driven, logic 0
driven, logic 0
Output
RESET_BAR_O
UT
driven, logic 0
driven, logic 0
driven, logic 1
driven, logic 1
Output. Firmware will release sensor reset
M_SCLK
High-
impedance
High-
impedance
High-
impedance
High-
impedance
Input/Output. A valid logic level should be
established by pull-up
M_SDATA
High-
impedance
High-
impedance
High-
impedance
High-
impedance
Input/Output. A valid logic level should be
established by pull-up
FV_IN ,LV_IN,
PIXCLK_IN,
DIN[11:0]
n/a
n/a
n/a
n/a
Dependent on
interface used
n/a
Input. Must always be driven to a valid logic
level



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