AP0100CS datasheet(41/73 Pages) ONSEMI

41 / 73 page

AP0100CS/D Rev. 6, Pub. 1/16 EN

©Semiconductor Components Industries, LLC,2016.

AP0100CS HDR: Image Signal Processor (ISP)

Overlay Adjustment

To ensure a correct position of the overlay to compensate for assembly deviation, the

overlay can be adjusted with assistance from the calibration statistics engine:

• The calibration statistics engine supports a windowed 8-bin luma histogram, either

row-wise (vertical) or column-wise (horizontal).

• The example calibration statistics function of the firmware can be used to perform an

automatic successive approximation search of a cross-hair target within the scene.

• On the first frame, the firmware performs a coarse horizontal search, followed by a

coarse vertical search in the second frame.

• In subsequent frames, the firmware reduces the region-of-interest of the search to the

histogram bins containing the greatest accumulator values, thereby refining the search.

• The resultant X, Y location of the cross-hair target can be used to assign a calibration

value of offset selected overlay graphic image positions within the output image.

• The calibration statistics also supports a manual mode, which allows the host to access

the raw accumulator values directly.

Composite Video Output

The external pin GPIO[3] can be used to configure the device for default NTSC or PAL

operation. This and other video configuration settings are available as register settings

accessible through the serial interface.

Single-Ended and Differential Composite Output

The composite output can be operated in a single-ended or differential mode by simply

changing the external resistor configuration. For single-ended termination, see

Figure 29 on page 41. The differential schematic is shown in Figure 30 on page 42.

Figure 29:

Single-Ended Termination

The DAC is differential, but it may be used to produce single-ended signals provided that

the unused (DAC_NEG) output is terminated into a resistance to ground approximately

equal to the load on the DAC_POS output. Without this termination, the internal bias

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