AS4C2M32SA-7TCN datasheet(15/54 Pages) ALSC

15 / 54 page

•

CAS Latency Field (A6~A4)

This field specifies the number of clock cycles from the assertion of the Read command to the first read

data. The minimum whole value of CAS Latency depends on the frequency of CLK. The minimum

whole value satisfying the following formula must be programmed into this field.

tCAC (min) ≤ CAS Latency X tCK

Table 8. CAS Latency Field

CAS Latency

Reserved

2 clocks

3 clocks

Reserved

•

Test Mode Field (A8~A7)

These two bits are used to enter the test mode and must be programmed to "00" in normal operation.

Table 9. Test Mode Field

Test Mode

normal mode

Vendor Use Only

•

Write Burst Length (A9)

This bit is used to select the write burst length. When the A9 bit is "0", the Burst-Read-Burst-Write mode

is selected. When the A9 bit is "1", the Burst-Read-Single-Write mode is selected.

Table 10. Write Burst length

Write Burst Length

Burst-Read-Burst-Write

Burst-Read-Single-Write

Note: A10 and BA0, 1 should stay “L” during mode set cycle.

No-Operation command

(RAS# = "H", CAS# = "H", WE# = "H")

The No-Operation command is used to perform a NOP to the SDRAM which is selected (CS# is

Low). This prevents unwanted commands from being registered during idle or wait states.

Burst Stop command

(RAS# = "H", CAS# = "H", WE# = "L")

The Burst Stop command is used to terminate either fixed-length or full-page bursts. This command

is only effective in a read/write burst without the auto precharge function. The terminated read burst

ends after a delay equal to the CAS latency (refer to the following figure). The termination of a write

burst is shown in the following figure.

AS4C2M32SA-6TIN

AS4C2M32SA-6TCN

AS4C2M32SA-7TCN

Confidential

-15/54-

Rev.1.0 Sep. 2015

AS4C2M32SA-7TCN 数据表(PDF) 15 Page - Alliance Semiconductor Corporation

AS4C2M32SA-7TCN 数据表(HTML) 15 Page - Alliance Semiconductor Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54

数据表下载