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AS4C2M32SA-7TCN 数据表(PDF) 19 Page - Alliance Semiconductor Corporation |
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AS4C2M32SA-7TCN 数据表(HTML) 19 Page - Alliance Semiconductor Corporation |
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19 / 54 page ![]() Table 14. D.C. Characteristics (VDD = 3.3V ± 0.3V, TA = -40~85°C) Description/Test condition Symbol -5 -6 -7 Unit Note Max. Operating Current (One bank active) tRC ≥ tRC(min), Outputs Open, Input signal one transition per one cycle IDD1 120 95 75 mA 3 Precharge Standby Current in non-power down mode tCK = 15ns, CS# ≥ VIH(min), CKE ≥ VIH Input signals are changed every 2clks IDD2N 25 25 25 Precharge Standby Current in non-power down mode tCK = ∞, CLK ≤ VIL(max), CKE ≥ VIH IDD2NS 15 15 15 Precharge Standby Current in power down mode tCK = 15ns, CKE ≤ VIL(max) IDD2P 2 2 2 Precharge Standby Current in power down mode tCK = ∞, CKE ≤ VIL(max) IDD2PS 2 2 2 Active Standby Current in non-power down mode tCK = 15ns, CKE ≥ VIH(min), CS# ≥ VIH(min) Input signals are changed every 2clks IDD3N 35 35 35 Active Standby Current in non-power down mode CKE ≥ VIH(min), CLK ≤ VIL(max), tCK = ∞ IDD3NS 30 30 30 Operating Current (Burst mode) tCK =tCK(min), Outputs Open, Multi-bank interleave IDD4 120 100 90 3, 4 Refresh Current tRC ≥ tRC(min) IDD5 150 130 120 3 Self Refresh Current CKE ≤ 0.2V ; for other inputs VIH≧VDD - 0.2V, VIL ≤ 0.2V IDD6 2 2 2 AS4C2M32SA-6TIN AS4C2M32SA-6TCN AS4C2M32SA-7TCN Confidential -19/54- Rev.1.0 Sep. 2015 |
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