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数据搜索系统，热门电子元器件搜索 |
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ST92185B 数据表(PDF) 123 Page - STMicroelectronics |
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ST92185B 数据表(HTML) 123 Page - STMicroelectronics |
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123 / 178 page  123/178 ST92185B - ON SCREEN DISPLAY (OSD) ON SCREEN DISPLAY (Cont’d) HEADER & STATUS CONTROL REGISTER (HSCR) R244 - Read/Write Register Page: 32 Reset Value: 0010 1010 (2Ah) Bit 7:6 = Reserved. Bit 5,3 = ES[1:0]: Enable Status Rows [1:0] dis- play control bits. If the bit is reset, the correspond- ing Status Row is filled with the full screen color; if the bit is set, the corresponding Status Row is dis- played (Status Row 1 is assumed to be the bottom one). Bit 4,2 = NS[1:0]: Serial/Parallel Mode Status Rows display control bits. If the corresponding bit is reset, the Status Row uses only serial attributes. If the corresponding bit is set, the Status Row uses parallel attributes (except size attributes). Bit 1 = EH: Enable Header display control bit. If set, the Header row is displayed; if reset, the Header row is filled with the full screen color. Bit 0 = NH: Serial/Parallel Mode Header display control bit. If the bit is reset, the Header uses only serial attributes. If the bit is set, the Header uses of parallel attributes. 70 0 0 ES1 NS1 ES0 NS0 EH NH |
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