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ST92185B - GENERAL DESCRIPTION

PIN DESCRIPTION (Cont’d)

P0[7:0], P2[5:0], P3[7:4], P4[7:0], P5[1:0]

I/O Port Lines (Input/Output, TTL or CMOS com-

patible).

28 lines grouped into I/O ports, bit programmable

as general purpose I/O or as Alternate functions

(see I/O section).

Important: Note that open-drain outputs are for

logic levels only and are not true open drain.

1.2.1 I/O Port Alternate Functions.

Each pin of the I/O ports of the ST92185B may as-

sume software programmable Alternate Functions

(see Table 1).

Table 1. ST92185B I/O Port Alternate Function Summary

Port

Name

General

Purpose I/O

Pin No.

Alternate Functions

SDIP42

SDIP56

P0.0

All ports useable

for general pur-

pose I/O (input,

output or bidi-

rectional)

I/O

P0.1

I/O

P0.2

AIN4

A/D Analog Data Input 4

P0.3

I/O

P0.4

I/O

P0.5

I/O

P0.6

I/O

P0.7

I/O

P2.0

INT7

External Interrupt 7

P2.1

AIN1

A/D Analog Data Input 1

INT5

External Interrupt 5

P2.2

INT0

External Interrupt 0

AIN2

A/D Analog Data Input 2

P2.3

INT6

External Interrupt 6

VSO1

Voltage Synthesis Output 1

P2.4

NMI

Non Maskable Interrupt Input

P2.5

AIN3

A/D Analog Data Input 3

INT4

External Interrupt 4

VSO2

Voltage Synthesis Output 2

P3.4

I/O

P3.5

I/O

P3.6

I/O

P3.7

RESET0

Internal Reset Output

CSO

Composite Sync output

P4.0

PWM0

PWM Output 0

P4.1

PWM1

PWM Output 1

P4.2

PWM2

PWM Output 2

P4.3

PWM3

PWM Output 3

TSLU

Translucency Digital Output

Half-tone Output

P4.4

PWM4

PWM Output 4

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