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USB3450 数据表(PDF) 22 Page - Microchip Technology

部件名 USB3450
功能描述  Hi-Speed USB Host or Device PHY With UTMI Interface
PDF  39 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

USB3450 数据表(HTML) 22 Page - Microchip Technology

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USB3450
DS00002105A-page 22
2005 - 2016 Microchip Technology Inc.
The only exception to this is when OPMODE[1:0] is set to state 2 while TXVALID has been asserted (the transceiver is
transmitting a packet), in order to flag a transmission error. In this case, the USB3450 has already transmitted the SYNC
pattern so upon negation of TXVALID the EOP must also be transmitted to properly terminate the packet. Changing the
OPMODE[1:0] signals under all other conditions, while the transceiver is transmitting or receiving data will generate
undefined results.
6.3
Test Mode Support
6.4
SE0 Handling
For FS operation, IDLE is a J state on the bus. SE0 is used as part of the EOP or to indicate reset. When asserted in
an EOP, SE0 is never asserted for more than 2 bit times. The assertion of SE0 for more than 2.5us is interpreted as a
reset by the device operating in FS mode.
For HS operation, IDLE is a SE0 state on the bus. SE0 is also used to reset a HS device. A HS device cannot use the
2.5us assertion of SE0 (as defined for FS operation) to indicate reset since the bus is often in this state between packets.
If no bus activity (IDLE) is detected for more than 3ms, a HS device must determine whether the downstream facing
port is signaling a suspend or a reset. The following section details how this determination is made. If a reset is signaled,
the HS device will then initiate the HS Detection Handshake protocol.
6.5
Reset Detection
If a device in HS mode detects bus inactivity for more than 3ms (T1), it reverts to FS mode. This enables the FS pull-up
on the DP line in an attempt to assert a continuous FS J state on the bus. The Link must then check LINESTATE for the
SE0 condition. If SE0 is asserted at time T2, then the upstream port is forcing the reset state to the device (i.e., a Driven
SE0). The device will then initiate the HS detection handshake protocol.
TABLE 6-3:
HI-SPEED TEST MODES
Hi-Speed Test Modes
USB3450 Setup
Operational Mode
Link Transmitted Data
XCVRSELECT &
TERMSELECT
SE0_NAK
State 0
No transmit
HS
J
State 2
All '1's
HS
K
State 2
All '0's
HS
Test_Packet
State 0
Test Packet data
HS
FIGURE 6-1:
RESET TIMING BEHAVIOR (HS MODE)



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