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USB3450 数据表(PDF) 9 Page - Microchip Technology

部件名 USB3450
功能描述  Hi-Speed USB Host or Device PHY With UTMI Interface
PDF  39 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

USB3450 数据表(HTML) 9 Page - Microchip Technology

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2005 - 2016 Microchip Technology Inc.
DS00002105A-page 9
USB3450
30
RXVALID
Output
High
Receive Data Valid. Indicates that the DATA bus has
received valid data. The Receive Data Holding
Register is full and ready to be unloaded. The Link is
expected to register the DATA bus on the rising edge
of CLKOUT.
31
HOST
Input
N/A
Host Pull-down Select. This signal enables the 15k
Ohm pull-down resistor on the DM line.
0: Pull-down resistor not connected to DM
1: Pull-down resistor connected to DM
32
RXERROR
Output
High
Receive Error. This output is clocked with the same
timing as the receive DATA lines and can occur at
anytime during a transfer.
0: Indicates no error.
1: Indicates a receive error has been detected.
33
VDD3.3
N/A
N/A
3.3V PHY Supply. Provides power for Hi-Speed
Transceiver, UTMI+ Digital, Digital I/O, and
Regulators.
34
VDD1.8
N/A
N/A
1.8V regulator output for digital circuitry on chip. Place
a 4.7uF low ESR capacitor near this pin and connect
the capacitor from this pin to ground. Connect pin 34
to pin 19. See Section 5.6.1, "Internal Regulators".
35
XO
Output,
Analog
N/A
Crystal pin. If using an external clock on XI this pin
should be floated.
36
XI
Input,
Analog
N/A
Crystal pin. A 24MHz crystal is supported. The crystal
is placed across XI and XO. An external 24MHz clock
source may be driven into XI in place of a crystal.
37
VDDA1.8
N/A
N/A
1.8V regulator output for analog circuitry on chip.
Place a 0.1uF capacitor near this pin and connect the
capacitor from this pin to ground. In parallel, place a
4.7uF low ESR capacitor near this pin and connect the
capacitor from this pin to ground. See Section 5.6.1,
"Internal Regulators".
38
VDD3.3
N/A
N/A
3.3V PHY Supply. Provides power for Hi-Speed
Transceiver, UTMI+ Digital, Digital I/O, and
Regulators.
39
VDD3.3
N/A
N/A
3.3V PHY Supply. Should be connected directly to pin
39.
40
RBIAS
Analog,
CMOS
N/A
External 1% bias resistor. Requires a 12KΩ resistor to
ground.
GND FLAG
Ground
N/A
Ground. The flag must be connected to the ground
plane.
TABLE 2-1:
USB3450 PIN DEFINITIONS (CONTINUED)
Pin
Name
Direction,
Type
Active
Level
Description



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