USB3450 datasheet(8/39 Pages) MICROCHIP

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USB3450

DS00002105A-page 8

 2005 - 2016 Microchip Technology Inc.

OPMODE[1]

Input

N/A

Operational Mode. These signals select between the

various operational modes:

[1]

[0]

Description

0: Normal Operation

1: Non-driving (all terminations removed)

2: Disable bit stuffing and NRZI encoding

3: Reserved

OPMODE[0]

Input

N/A

CLKOUT

Output,

CMOS

N/A

60MHz reference clock output. All UTMI+ signals are

driven synchronous to this clock.

LINESTATE[1]

Output

N/A

Line State. These signals reflect the current state of

the USB data bus in FS mode. Bit [0] reflects the state

of DP and bit [1] reflects the state of DM. When the

device is suspended or resuming from a suspended

state, the signals are combinatorial. Otherwise, the

signals are synchronized to CLKOUT.

[1]

[0]

Description

0: SEO

1: J State

2: K State

3: SE1

LINESTATE[0]

Output

N/A

VDD1.8

N/A

1.8V regulator output for digital circuitry on chip. Place

a 0.1uF capacitor near this pin and connect the

capacitor from this pin to ground. Connect pin 19 to

pin 34.

VDD3.3

N/A

3.3V PHY Supply. Provides power for Hi-Speed

Transceiver, UTMI+ Digital, Digital I/O, and

Regulators.

HOSTDISC

Output

High

Host Disconnect. Indicates that a downstream device

has been disconnected from this host PHY when

operating in HS host mode. Automatically reset to 0b

when Low Power Mode is entered.

DATA[7]

I/O,

CMOS,

Pull-low

N/A

8-bit bi-directional data bus. Data[7] is the MSB and

Data[0] is the LSB.

DATA[6]

I/O,

CMOS,

Pull-low

N/A

DATA[5]

I/O,

CMOS,

Pull-low

N/A

DATA[4]

I/O,

CMOS,

Pull-low

N/A

DATA[3]

I/O,

CMOS,

Pull-low

N/A

DATA[2]

I/O,

CMOS,

Pull-low

N/A

DATA[1]

I/O,

CMOS,

Pull-low

N/A

DATA[0]

I/O,

CMOS,

Pull-low

N/A

TABLE 2-1:

USB3450 PIN DEFINITIONS (CONTINUED)

Name

Direction,

Type

Active

Level

Description

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