USB3450

DS00002105A-page 18

The receivers connect directly to the USB cable. The block contains a separate differential receiver for HS and FS mode.

Depending on the mode, the selected receiver provides the serial data stream through the mulitplexer to the RX Logic

block. The FS mode section of the FS/HS RX block also consists of a single-ended receiver on each of the data lines

to determine the correct FS LINESTATE. For HS mode support, the FS/HS RX block contains a squelch circuit to insure

that noise is never interpreted as data.

5.4

Hi-Speed Transceiver

The Microchip Hi-Speed Transceiver consists of four blocks in the lower left corner of FIGURE 2-1: on page 5. These

four blocks are labeled HS XCVR, FS/LS XCVR, Resistors, and Bias Gen.

5.4.1

HIGH SPEED AND FULL SPEED TRANSCEIVERS

The USB3450 transceiver meets all requirements in the Hi-Speed specification.

The receivers connect directly to the USB cable. This block contains a separate differential receiver for HS and FS

mode. Depending on the mode, the selected receiver provides the serial data stream through the multiplexer to the RX

Logic block. The FS mode section of the FS/HS RX block also consists of a single-ended receiver on each of the data

lines to determine the correct FS linestate. For HS mode support, the FS/HS RX block contains a squelch circuit to

insure that noise is never interpreted as data.

The transmitters connect directly to the USB cable. The block contains a separate differential FS and HS transmitter

which receive encoded, bit stuffed, serialized data from the TX Logic block and transmit it on the USB cable.

5.4.2

TERMINATION RESISTORS

The USB3450 transceiver fully integrates all of the USB termination resistors. The USB3450 includes two 1.5kΩ pull-

up resistors on DP and DM and a 15kΩ pull-down resistor on both DP and DM. In addition the 45Ω high speed termi-

nation resistors are also integrated. These integrated resistors require no tuning or trimming by the Link. The state of

the resistors is determined by the operating mode of the PHY. The possible valid resistor combinations are shown in

Figure 5-8. Operation is provided in the configurations given in Table 5-8, "DP/DM termination vs. Signaling Mode".

• RPU_DP_EN activates the 1.5kΩ DP pull-up resistor

• RPU_DM_EN activates the 1.5kΩ DM pull-up resistor

• RPD_DP_EN activates the 15kΩ DP pull-down resistor

• RPD_DM_EN activates the 15kΩ DM pull-down resistor

• HSTERM_EN activates the 45Ω DP and DM high speed termination resistors

FIGURE 5-7:

RECEIVE TIMING FOR DATA PACKET (WITH CRC-16)