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MB91F465KB 数据表(PDF) 61 Page - Cypress Semiconductor |
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MB91F465KB 数据表(HTML) 61 Page - Cypress Semiconductor |
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61 / 86 page ![]() MB91460K Series Document Number: 002-04602 Rev. *A Page 61 of 86 86 14.2 Clock Modulator Settings The following table shows all possible settings for the Clock Modulator in a base clock frequency range from 32MHz up to 48MHz. Base clock frequencies above 48 MHz are not allowed on MB91F465Kx. The Flash access time settings need to be adjusted according to Fmax while the PLL and clockgear settings should be set according to base clock frequency . Table 6: Clock Modulator settings, frequency range and supported supply voltage Modulation Degree (k) Random No (N) CMPR [hex] Baseclk [MHz] Fmin [MHz] Fmax [MHz] Remarks 1 3 026F 48 44.2 52.5 1 5 02AE 48 41.8 56.4 1 7 02ED 48 39.6 60.9 1 9 032C 48 37.7 66.1 1 11 036B 48 35.9 72.3 1 13 03AA 48 34.3 79.9 1 15 03E9 48 32.8 89.1 [1] 2 3 046E 48 41.8 56.4 2 5 04AC 48 37.7 66.1 2 7 04EA 48 34.3 79.9 3 3 066D 48 39.6 60.9 3 5 06AA 48 34.3 79.9 4 3 086C 48 37.7 66.1 5 3 0A6B 48 35.9 72.3 6 3 0C6A 48 34.3 79.9 7 3 0E69 48 32.8 89.1 [1] 1 3 026F 44 40.6 48.1 1 5 02AE 44 38.4 51.6 1 7 02ED 44 36.4 55.7 1 9 032C 44 34.6 60.4 1 11 036B 44 33 66.1 1 13 03AA 44 31.5 73 1 15 03E9 44 30.1 81.4 [1] 2 3 046E 44 38.4 51.6 2 5 04AC 44 34.6 60.4 2 7 04EA 44 31.5 73 2 9 0528 44 28.9 92.1 [1] |
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