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MB91F465KB 数据表(PDF) 18 Page - Cypress Semiconductor

部件名 MB91F465KB
功能描述  32-bit RISC, load/store architecture, five-stage pipeline
PDF  86 Pages
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制造商  CYPRESS [Cypress Semiconductor]
网页  http://www.cypress.com
标志 CYPRESS - Cypress Semiconductor

MB91F465KB 数据表(HTML) 18 Page - Cypress Semiconductor

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MB91460K Series
Document Number: 002-04602 Rev. *A
Page 18 of 86
86
5. Handling Devices
5.1
Preventing Latch-up
Latch-up may occur in a CMOS IC if a voltage higher than (VDD5) or less than (VSS5) is applied to an input or output pin or if a
voltage exceeding the rating is applied between the power supply pins and ground pins. If latch-up occurs, the power supply
current increases rapidly, sometimes resulting in thermal breakdown of the device. Therefore, be very careful not to apply
voltages in excess of the absolute maximum ratings.
5.2
Handling of Unused Input Pins
If unused input pins are left open, abnormal operation may result. Any unused input pins should be connected to pull-up or
pull-down resistor (2K
 to 10K) or enable internal pullup or pulldown resisters (PPER/PPCR) before the input enable (PORTEN)
is activated by software. The mode pins MD_x can be connected to VSS5 or VDD5 directly. Unused ALARM input pins can be
connected to AVSS5 directly.
5.3
Power Supply Pins
In MB91460K series, devices including multiple power supply pins and ground pins are designed as follows; pins necessary to
be at the same potential are interconnected internally to prevent malfunctions such as latch-up. All of the power supply pins and
ground pins must be externally connected to the power supply and ground respectively in order to reduce unnecessary radiation,
to prevent strobe signal malfunctions due to the ground level rising and to follow the total output current ratings. Furthermore,
the power supply pins and ground pins of the MB91460K series must be connected to the current supply source via a low
impedance.It is also recommended to connect a ceramic capacitor of approximately 0.1
F as a bypass capacitor between
power supply pin and ground pin near this device.This series has a built-in step-down regulator. Connect a bypass capacitor of
4.7
F (use a X7R ceramic capacitor) to VCC18C pin for the regulator.
5.4
Crystal Oscillator Circuit
Noise in proximity to the X0 (X0A) and X1 (X1A) pins can cause the device to operate abnormally. Printed circuit boards should
be designed so that the X0 (X0A) and X1 (X1A) pins, and crystal oscillator, as well as bypass capacitors connected to ground,
are located near the device and ground.
It is recommended that the printed circuit board layout be designed such that the X0 and X1 pins or X0A and X1A pins are
surrounded by ground plane for the stable operation.
Please request the oscillator manufacturer to evaluate the oscillational characteristics of the crystal and this device.
5.5
Notes on using External Clock
When using the external clock, it is necessary to simultaneously supply the X0 (X0A) and the X1 (X1A) pins. In the described
combination, X1 (X1A) should be supplied with a clock signal which has the opposite phase to the X0 (X0A) pins. At X0 and X1,
a frequency up to 16 MHz is possible.
Example of using opposite phase supply
X0 (X0A)
X1 (X1A)



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