PC87311AVF datasheet(4/78 Pages) NSC

4 / 78 page

List of Tables

TABLE 2-1

Default Configurations Controlled by Hardware

TABLE 2-2

Index and Data Register Optional Locations

TABLE 2-3

Primary and Secondary Drive Address Selection

TABLE 2-4

Encoded Drive and Motor Pin Information

TABLE 2-5

Parallel Port Addresses

TABLE 2-6a

COM Port Selection for UART1

TABLE 2-6b

COM Port Selection for UART2

TABLE 2-7

Address Selection for COM3 and COM4

TABLE 3-1

TABLE 3-2

Drive Enable Values

TABLE 3-3

Tape Drive Assignment Values

TABLE 3-4

Write Precompensation Delays

TABLE 3-5

Default Precompensation Delays

TABLE 3-6

Data Rate Select Encoding

TABLE 4-1

Typical Format Gap Length Values

TABLE 4-2

DENSEL Encoding

TABLE 4-3

DENSEL Default Encoding

TABLE 4-4

Effect of Drive Mode and Data Rate on Format and Write Commands

TABLE 4-4a

Effect of GAP and WG on Format and Write Commands

TABLE 4-5

Sector Size Selection

TABLE 4-6

SK Effect on Read Data Command

TABLE 4-7

Result Phase Termination Values with No Error

TABLE 4-8

SK Effect on Read Deleted Data Command

TABLE 4-9

Maximum Recalibrate Step Pulses Based on R255 and ETR

TABLE 4-10

Scan Command Termination Values

TABLE 4-11

Status Register 0 Termination Codes

TABLE 4-12

Set Track Register Address

TABLE 4-13

Step Rate (SRT) Values

TABLE 4-14

Motor Off Time (MFT) Values

TABLE 4-15

Motor On Time (MNT) Values

TABLE 4-16

Verify Command Result Phase Table

TABLE 6-1

PC87311A UART Register Addresses (AEN e 0)

TABLE 6-2

PC87311A Register Summary for an Individual UART Channel

TABLE 6-3

PC87311A UART Reset Configuration

TABLE 6-4

PC87311A UART Divisors Baud Rates and Clock Frequencies

TABLE 6-5

PC87311A Interrupt Control Functions

TABLE 6-6

PC87312 UART Register Addresses (AEN e 0)

TABLE 6-7

PC87312 Register Summary for an Individual UART Channel

TABLE 6-8

PC87312 UART Reset Configuration

TABLE 6-9

PC87312 UART Divisors Baud Rates and Clock Frequencies

TABLE 6-10

PC87312 Interrupt Control Functions

TABLE 7-1

Parallel Interface Register Addresses

TABLE 7-2

Data Register Read and Write Modes

TABLE 7-3

Parallel Port Mode of Operation

TABLE 7-4

Parallel Port Reset States

TABLE 8-1

IDE Registers and Their ISA Addresses

TABLE 9-1

Nominal tICP tDRP Values

TABLE 9-2

Minimum tWDW Values

TABLE 10-1

PC87311A87312 Four Floppy Drive Encoding

PC87311AVF 数据表(PDF) 4 Page - National Semiconductor (TI)

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