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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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PC87311AVF 数据表(PDF) 2 Page - National Semiconductor (TI) |
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PC87311AVF 数据表(HTML) 2 Page - National Semiconductor (TI) |
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2 / 78 page  Table of Contents 10 PIN DESCRIPTION 6 20 CONFIGURATION REGISTERS 12 21 Overview 12 22 Software Configuration 12 23 Hardware Configuration 12 24 Index and Data Registers 14 25 Base Configuration Registers 14 251 Function Enable Register (FER) 14 252 Function Address Register (FAR) 16 253 Power and Test Register (PTR) 16 26 Power Down Options 16 27 Power Up Procedure and Considerations 17 271 Crystal Stabilization 17 272 UART Power-Up 17 273 FDC Power-Up 17 30 FDC REGISTER DESCRIPTION 17 31 Status Register A (SRA) 18 311 SRAPS2 Mode 19 312 SRAModel 30 Mode 19 32 Status Register B (SRB) 19 321 SRBPS2 Mode 19 322 SRBModel 30 Mode 19 33 Digital Output Register (DOR) 20 34 Tape Drive Register (TDR) 20 35 Main Status Register (MSR) 20 36 Data Rate Select Register (DSR) 21 37 Data Register (FIFO) 22 38 Digital Input Register (DIR) 22 381 DIRPC-AT Mode 22 382 DIRPS2 Mode 22 383 DIRModel 30 Mode 22 39 Configuration Control Register (CCR) 23 391 CCRPC-AT and PS2 Modes 23 392 CCRModel 30 Mode 23 310 Result Phase Status Registers 23 3101 Status Register 0 (ST0) 23 3102 Status Register 1 (ST1) 23 3103 Status Register 2 (ST2) 24 3104 Status Register 3 (ST3) 24 40 FDC COMMAND SET DESCRIPTION 24 41 Command Set Summary 24 42 Command Description 28 421 Configure Command 28 422 Dumpreg Command 29 423 Format Track Command29 424 Invalid Command 32 425 Lock Command 32 426 Mode Command 32 427 NSC Command 33 428 Perpendicular Mode Command 33 429 Read Data Command 34 4210 Read Deleted Data Command 36 4211 Read ID Command 36 4212 Read A Track Command 36 4213 Recalibrate Command 36 4214 Relative Seek Command 36 4215 Scan Commands37 4216 Seek Command37 4217 Sense Drive Status Command 37 4218 Sense Interrupt Command 37 4219 Set Track Command38 4220 Specify Command38 4221 Verify Command 39 4222 Version Command 39 4223 Write Data Command 39 4224 Write Deleted Data Command 40 50 FDC FUNCTIONAL DESCRIPTION 40 51 Microprocessor Interface 40 52 Modes of Operation 41 53 Controller Phases 41 531 Command Phase 41 532 Execution Phase 41 5321 DMA ModeFIFO Disabled 41 5322 DMA ModeFIFO Enabled 42 5323 Interrupt ModeFIFO Disabled 42 5324 Interrupt ModeFIFO Enabled 43 5325 Software Polling 43 533 Result Phase 43 534 Idle Phase 43 535 Drive Polling Phase 43 54 Data Separator 43 55 Crystal Oscillator 45 56 Perpendicular Recording Mode 46 57 Data Rate Selection 47 58 Write Precompensation 47 59 FDC Low Power Mode Logic 47 510 Reset Operation 47 60 SERIAL PORTS 48 61 Introduction 48 62 PC87311A Serial Ports 48 621 Serial Port Registers 48 622 Line Control Register (LCR) 48 623 Programmable Baud Rate Generator 51 624 Line Status Register (LSR) 51 625 Interrupt Identification Register (IIR) 52 626 Interrupt Enable Register (IER) 52 627 MODEM Control Register (MCR) 52 628 MODEM Status Register (MSR) 53 629 Scratchpad Register (SCR) 53 63 PC87312 Serial Ports 53 631 Serial Port Registers 53 632 Line Control Register (LCR) 53 633 Programmable Baud Rate Generator 56 2 |
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