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TNETV2685FIBZUT7 数据表(PDF) 144 Page - Texas Instruments |
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TNETV2685FIBZUT7 数据表(HTML) 144 Page - Texas Instruments |
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144 / 191 page  HCS HAS HR/W HHWIL HSTROBE(A) HD[15:0] HRDY(B) 2 3 1 37 9 10 14 2 38 12 11 12 11 12 11 13 7 6 1 3 13 37 9 10 36 HCNTL[1:0] 12 11 12 11 12 11 TMS320DM647 TMS320DM648 SPRS372H – MAY 2007 – REVISED APRIL 2012 www.ti.com A. HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT(HDS1 XOR HDS2)] OR HCS. B. Depending on the type of write or read operation (HPID without auto-incrementing; HPIA, HPIC, or HPID with auto- incrementing) and the state of the FIFO, transitions on HRDY may or may not occur. For more detailed information on the HPI peripheral, see the TMS320DM647/DM648 DSP Host Port Interface (HPI) User's Guide (literature number SPRUEL5). Figure 6-43. HPI16 Write Timing (HAS Used) 144 Peripheral Information and Electrical Specifications Copyright © 2007–2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320DM647 TMS320DM648 |
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