ENICSF2811PBKA datasheet(2/172 Pages) TI1

2 / 172 page

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

www.ti.com

SPRS174T – APRIL 2001 – REVISED MAY 2012

Contents

TMS320F281x, TMS320C281x DSPs

..................................................................................... 10

1.1

Features

.................................................................................................................... 10

1.2

Getting Started

............................................................................................................. 11

Introduction

...................................................................................................................... 12

2.1

Description

................................................................................................................. 12

2.2

Device Summary

.......................................................................................................... 13

2.3

Pin Assignments

........................................................................................................... 14

2.3.1

Terminal Assignments for the GHH/ZHH Packages

....................................................... 14

2.3.2

Pin Assignments for the PGF Package

...................................................................... 15

2.3.3

Pin Assignments for the PBK Package

...................................................................... 16

2.4

Signal Descriptions

........................................................................................................ 17

Functional Overview

.......................................................................................................... 26

3.1

Memory Map

............................................................................................................... 27

3.2

Brief Descriptions

.......................................................................................................... 32

3.2.1

C28x CPU

....................................................................................................... 32

3.2.2

Memory Bus (Harvard Bus Architecture)

.................................................................... 32

3.2.3

Peripheral Bus

.................................................................................................. 32

3.2.4

Real-Time JTAG and Analysis

................................................................................ 33

3.2.5

External Interface (XINTF) (2812 Only)

...................................................................... 33

3.2.6

Flash (F281x Only)

............................................................................................. 33

3.2.7

ROM (C281x Only)

............................................................................................. 33

3.2.8

M0, M1 SARAMs

............................................................................................... 34

3.2.9

L0, L1, H0 SARAMs

............................................................................................ 34

3.2.10

Boot ROM

....................................................................................................... 34

3.2.11

Security

.......................................................................................................... 34

3.2.12

Peripheral Interrupt Expansion (PIE) Block

................................................................. 36

3.2.13

External Interrupts (XINT1, XINT2, XINT13, XNMI)

........................................................ 36

3.2.14

Oscillator and PLL

.............................................................................................. 36

3.2.15

Watchdog

........................................................................................................ 36

3.2.16

Peripheral Clocking

............................................................................................. 36

3.2.17

Low-Power Modes

.............................................................................................. 36

3.2.18

Peripheral Frames 0, 1, 2 (PFn)

.............................................................................. 37

3.2.19

General-Purpose Input/Output (GPIO) Multiplexer

......................................................... 37

3.2.20

32-Bit CPU-Timers (0, 1, 2)

................................................................................... 37

3.2.21

Control Peripherals

............................................................................................. 37

3.2.22

Serial Port Peripherals

......................................................................................... 38

3.3

............................................................................................................... 39

3.4

Device Emulation Registers

.............................................................................................. 41

3.5

External Interface, XINTF (2812 Only)

................................................................................. 42

3.5.1

Timing Registers

................................................................................................ 43

3.5.2

XREVISION Register

........................................................................................... 43

3.6

Interrupts

.................................................................................................................... 44

3.6.1

External Interrupts

.............................................................................................. 47

3.7

System Control

............................................................................................................ 48

3.8

OSC and PLL Block

....................................................................................................... 50

3.8.1

Loss of Input Clock

............................................................................................. 51

3.9

PLL-Based Clock Module

................................................................................................ 52

3.10

External Reference Oscillator Clock Option

........................................................................... 52

3.11

Watchdog Block

........................................................................................................... 53

3.12

Low-Power Modes Block

................................................................................................. 54

Peripherals

....................................................................................................................... 55

Contents

ENICSF2811PBKA 数据表(PDF) 2 Page - Texas Instruments

ENICSF2811PBKA 数据表(HTML) 2 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载