ENICSF2811PBKA datasheet(97/172 Pages) TI1

97 / 172 page

6 inches or less

EMU0

GND

EMU1

TMS

TDI

DSP

JTAG Header

TDO

TCK

TCK_RET

TRST

DDIO

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

www.ti.com

SPRS174T – APRIL 2001 – REVISED MAY 2012

6.6

Reducing Current Consumption

28x DSPs incorporate a unique method to reduce the device current consumption. A reduction in current

consumption can be achieved by turning off the clock to any peripheral module which is not used in a

given application. Table 6-3 indicates the typical reduction in current consumption achieved by turning off

the clocks to various peripherals.

Table 6-3. Typical Current Consumption by Various Peripherals (at 150 MHz)(1)

PERIPHERAL MODULE

IDD CURRENT REDUCTION (mA)

eCAN

EVA

EVB

ADC

8(2)

SCI

SPI

McBSP

(1)

All peripheral clocks are disabled upon reset. Writing to/reading from peripheral registers is possible

only after the peripheral clocks are turned on.

(2)

This number represents the current drawn by the digital portion of the ADC module. Turning off the

clock to the ADC module results in the elimination of the current drawn by the analog portion of the

ADC (IDDA) as well.

6.7

Emulator Connection Without Signal Buffering for the DSP

Figure 6-5 shows the connection between the DSP and JTAG header for a single-processor configuration.

If the distance between the JTAG header and the DSP is greater than 6 inches, the emulation signals

must be buffered. If the distance is less than 6 inches, buffering is typically not needed. Figure 6-5 shows

the simpler, no-buffering situation. For the pullup/pulldown resistor values, see the pin description section.

Figure 6-5. Emulator Connection Without Signal Buffering for the DSP

Electrical Specifications

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Product Folder Link(s): TMS320F2810 TMS320F2811 TMS320F2812 TMS320C2810 TMS320C2811 TMS320C2812

ENICSF2811PBKA 数据表(PDF) 97 Page - Texas Instruments

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