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ENICSF2811PBKA 数据表(PDF) 85 Page - Texas Instruments |
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ENICSF2811PBKA 数据表(HTML) 85 Page - Texas Instruments |
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85 / 172 page ![]() Peripheral I/O MUX 0 1 MUX 1 0 PIN Internal (Pullup or Pulldown) Digital I/O XRS High-Impedance Enable (1) High- Impedance Control GPxDIR Register Bit GPxMUX Register Bit GPxQUAL Register GPxDAT/SET/CLEAR/TOGGLE Register Bit(s) Input Qualification SYSCLKOUT TMS320F2810, TMS320F2811, TMS320F2812 TMS320C2810, TMS320C2811, TMS320C2812 www.ti.com SPRS174T – APRIL 2001 – REVISED MAY 2012 Figure 4-12 shows how the various register bits select the various modes of operation for GPIO function. A. In the GPIO mode, when the GPIO pin is configured for output operation, reading the GPxDAT data register only gives the value written, not the value at the pin. In the peripheral mode, the state of the pin can be read through the GPxDAT register, provided the corresponding direction bit is zero (input mode). B. Some selected input signals are qualified by the SYSCLKOUT. The GPxQUAL register specifies the qualification sampling period. The sampling window is 6 samples wide and the output is only changed when all samples are the same (all 0's or all 1's). This feature removes unwanted spikes from the input signal. Figure 4-12. GPIO/Peripheral Pin Multiplexing NOTE The input function of the GPIO pin and the input path to the peripheral are always enabled. It is the output function of the GPIO pin that is multiplexed with the output path of the primary (peripheral) function. Since the output buffer of a pin connects back to the input buffer, any GPIO signal present at the pin will be propagated to the peripheral module as well. Therefore, when a pin is configured for GPIO operation, the corresponding peripheral functionality (and interrupt-generating capability) must be disabled. Otherwise, interrupts may be inadvertently triggered. This is especially critical when the PDPINTA and PDPINTB pins are used as GPIO pins, since a value of zero for GPDDAT.0 or GPDDAT.5 (PDPINTx) will put PWM pins in a high-impedance state. The CxTRIP and TxCTRIP pins will also put the corresponding PWM pins in high impedance, if they are driven low (as GPIO pins) and bit EXTCONx.0 = 1. Copyright © 2001–2012, Texas Instruments Incorporated Peripherals 85 Submit Documentation Feedback Product Folder Link(s): TMS320F2810 TMS320F2811 TMS320F2812 TMS320C2810 TMS320C2811 TMS320C2812 |
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