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ENICSF2811PBKA 数据表(PDF) 91 Page - Texas Instruments |
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ENICSF2811PBKA 数据表(HTML) 91 Page - Texas Instruments |
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91 / 172 page ![]() TMS320F2810, TMS320F2811, TMS320F2812 TMS320C2810, TMS320C2811, TMS320C2812 www.ti.com SPRS174T – APRIL 2001 – REVISED MAY 2012 6 Electrical Specifications This section provides the absolute maximum ratings and the recommended operating conditions for the TMS320F281x and TMS320C281x DSPs. 6.1 Absolute Maximum Ratings (1) Supply voltage range (VDDIO, VDD3VFL, VDDA1, VDDA2, VDDAIO, and AVDDREFBG) –0.3 V to 4.6 V Supply voltage range (VDD, VDD1) –0.5 V to 2.5 V Input voltage range, VIN –0.3 V to 4.6 V Output voltage range, VO –0.3 V to 4.6 V Input clamp current, IIK (VIN < 0 or VIN > VDDIO) (2) ±20 mA Output clamp current, IOK (VO < 0 or VO > VDDIO) ±20 mA Operating ambient temperature ranges, TA A version (GHH, ZHH, PGF, PBK)(3) –40°C to 85°C S version (GHH, ZHH, PGF, PBK)(3) –40°C to 125°C Q version (PGF, PBK)(3) –40°C to 125°C Junction temperature range, TJ –40°C to 150°C Storage temperature range, Tstg (3) –65°C to 150°C (1) Unless otherwise noted, the list of absolute maximum ratings are specified over operating temperature ranges. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Section 6.2, Recommended Operating Conditions, is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to VSS. (2) Continuous clamp current per pin is ±2 mA (3) Long-term high-temperature storage and/or extended use at maximum temperature conditions may result in a reduction of overall device life. For additional information, see the IC Package Thermal Metrics Application Report (literature number SPRA953) and the Reliability Data for TMS320LF24xx and TMS320F28xx Devices Application Report (literature number SPRA963). 6.2 Recommended Operating Conditions (1) MIN NOM MAX UNIT VDDIO Device supply voltage, I/O 3.14 3.3 3.47 V 1.8 V (135 MHz) 1.71 1.8 1.89 VDD, VDD1 Device supply voltage, CPU V 1.9 V (150 MHz) 1.81 1.9 2 VSS Supply ground 0 V VDDA1, VDDA2, ADC supply voltage 3.14 3.3 3.47 V AVDDREFBG, VDDAIO VDD3VFL Flash programming supply voltage 3.14 3.3 3.47 V fSYSCLKOUT Device clock frequency VDD = 1.9 V ± 5% 2 150 MHz (system clock) VDD = 1.8 V ± 5% 2 135 VIH High-level input voltage All inputs except X1/XCLKIN 2 VDDIO V X1/XCLKIN (@ 50 µA max) 0.7VDD VDD VIL Low-level input voltage All inputs except X1/XCLKIN 0.8 V X1/XCLKIN (@ 50 µA max) 0.3VDD IOH High-level output source current, All I/Os except Group 2 –4 mA VOH = 2.4 V Group 2(2) –8 IOL Low-level output sink current, All I/Os except Group 2 4 mA VOL = VOL MAX Group 2(2) 8 TA Ambient temperature A version –40 85 S version –40 125 °C Q version –40 125 (1) See Section 6.8 for power sequencing of VDDIO, VDDAIO, VDD, VDDA1/VDDA2/AVDDREFBG, and VDD3VFL. (2) Group 2 pins are as follows: XINTF pins, T1CTRIP_PDPINTA, TDO, XCLKOUT, XF, EMU0, and EMU1. Copyright © 2001–2012, Texas Instruments Incorporated Electrical Specifications 91 Submit Documentation Feedback Product Folder Link(s): TMS320F2810 TMS320F2811 TMS320F2812 TMS320C2810 TMS320C2811 TMS320C2812 |
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