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SPC560P50L5 数据表(PDF) 110 Page - STMicroelectronics

部件名 SPC560P50L5
功能描述  Fail safe protection
PDF  112 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

SPC560P50L5 数据表(HTML) 110 Page - STMicroelectronics

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Revision history
SPC560P44Lx, SPC560P50Lx
110/112
Doc ID 14723 Rev 9
07-Apr-2011
7
(cont’d)
SPC560P44Lx, SPC560P50Lx device configuration differences: Removed “temperature”
row (temperature information is provided in Order codes)
Updated SPC560P44Lx, SPC560P50Lx block diagram
Added SPC560P44Lx, SPC560P50Lx series block summary
Added
Section 1.5 Feature details
Section 2.1, Package pinouts: removed alternate functions from pinout diagrams
Supply pins: updated descriptions of power supply pins (1.2 V)
System pins: updated table
Pin muxing: added rows “B[4]” and “B[5]
Section 3.3, Absolute maximum ratings: added voltage specifications to titles of Figure 5
and
Figure 6; in Table 9, changed row “VSS_HV / Digital Ground” to “VSS / Device
Ground”; updated symbols
Section 3.4, Recommended operating conditions: added voltage specifications to titles of
Figure 7 and Figure 8
Recommended operating conditions (5.0 V), and Recommended operating conditions
(3.3 V): changed row “VSS_HV / Digital Ground” to “VSS / Device Ground”; updated
symbols
Updated
Section 3.5.1, Package thermal characteristics
Updated
Section 3.6, Electromagnetic interference (EMI) characteristics
Section 3.8.1, Voltage regulator electrical characteristics: amended titles of Table 16 and
Table 19
Voltage regulator electrical characteristics (configuration without resistor on base) and
Voltage regulator electrical characteristics (configuration with resistor on base):
updated symbol and values for VDD_LV_REGCOR
Low voltage monitor electrical characteristics: Updated VMLVDDOK_H max value—was
1.15 V; is 1.145 V
Section 3.10, DC electrical characteristics: reorganized contents
Updated
Section 3.10.1, NVUSRO register (includes adding
Section NVUSRO[OSCILLATOR_MARGIN] field description)
Supply current (5.0 V, NVUSRO[PAD3V5V] = 0): updated symbols
Corrected parameter descriptions in DC electrical characteristics (3.3 V,
NVUSRO[PAD3V5V] = 1):
–VOL_F—was “Fast, high level output voltage”; is “Fast, low level output voltage”
–VOL_SYM—was “Symmetric, high level output voltage”; is “Symmetric, low level output
voltage”
Supply current (3.3 V, NVUSRO[PAD3V5V] = 1): updated symbols
Main oscillator output electrical characteristics (5.0 V, NVUSRO[PAD3V5V] = 0): replaced
instances of EXTAL with XTAL
Main oscillator output electrical characteristics (3.3 V, NVUSRO[PAD3V5V] = 1): replaced
instances of EXTAL with XTAL
FMPLL electrical characteristics: replaced “PLLMRFM” with “FMPLL” in table title;
updated conditions; removed fsys row; updated fFMPLLOUT min value
ADC conversion characteristics: updated symbols; added row tADC_PU
Flash memory read access timing: added footnote to “Conditions” column
Section 3.16.1, Pad AC specifications: added Pad output delay diagram
In the range of figures “DSPI Classic SPI Timing — Master, CPHA = 0” to “DSPI PCS
Strobe (PCSS) Timing”: added note
Updated Order codes
Updated “Commercial product code structure” figure
Table 45: Added abbreviations “DUT”, “NPN”, and “RBW”
Table 46.
Revision history (continued)
Date
Revision
Changes



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