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SPC560P50L5 数据表(PDF) 20 Page - STMicroelectronics |
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SPC560P50L5 数据表(HTML) 20 Page - STMicroelectronics |
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20 / 112 page  Introduction SPC560P44Lx, SPC560P50Lx 20/112 Doc ID 14723 Rev 9 The sources of the ECC errors are: ● Flash memory ● SRAM 1.5.19 Peripheral bridge (PBRIDGE) The PBRIDGE implements the following features: ● Duplicated periphery ● Master access privilege level per peripheral (per master: read access enable; write access enable) ● Write buffering for peripherals ● Checker applied on PBRIDGE output toward periphery ● Byte endianess swap capability 1.5.20 Controller area network (FlexCAN) The SPC560P44Lx, SPC560P50Lx MCU contains one controller area network (FlexCAN) module. This module is a communication controller implementing the CAN protocol according to Bosch Specification version 2.0B. The CAN protocol was designed to be used primarily as a vehicle serial data bus, meeting the specific requirements of this field: real- time processing, reliable operation in the EMI environment of a vehicle, cost-effectiveness and required bandwidth. The FlexCAN module contains 32 message buffers. |
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