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数据搜索系统，热门电子元器件搜索 |
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SPC560P50L5 数据表(PDF) 48 Page - STMicroelectronics |
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SPC560P50L5 数据表(HTML) 48 Page - STMicroelectronics |
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48 / 112 page  Package pinouts and signal descriptions SPC560P44Lx, SPC560P50Lx 48/112 Doc ID 14723 Rev 9 G[7] PCR[103] ALT0 ALT1 ALT2 ALT3 GPIO[103] B[3] — — SIUL FlexPWM_0 — — I/O O — — Slow Medium — 83 G[8] PCR[104] ALT0 ALT1 ALT2 ALT3 — GPIO[104] — — — FAULT[0] SIUL — — — FlexPWM_0 I/O — — — I Slow Medium — 81 G[9] PCR[105] ALT0 ALT1 ALT2 ALT3 — GPIO[105] — — — FAULT[1] SIUL — — — FlexPWM_0 I/O — — — I Slow Medium — 79 G[10] PCR[106] ALT0 ALT1 ALT2 ALT3 — GPIO[106] — — — FAULT[2] SIUL — — — FlexPWM_0 I/O — — — I Slow Medium — 77 G[11] PCR[107] ALT0 ALT1 ALT2 ALT3 — GPIO[107] — — — FAULT[3] SIUL — — — FlexPWM_0 I/O — — — I Slow Medium — 75 1. ALT0 is the primary (default) function for each port after reset. 2. Alternate functions are chosen by setting the values of the PCR[PA] bitfields inside the SIU module. PCR[PA] = 00 → ALT0; PCR[PA] = 01 → ALT1; PCR[PA] = 10 → ALT2; PCR[PA] = 11 → ALT3. This is intended to select the output functions; to use one of the input-only functions, the PCR[IBE] bit must be written to ‘1’, regardless of the values selected in the PCR[PA] bitfields. For this reason, the value corresponding to an input only function is reported as “—”. 3. Module included on the MCU. 4. Multiple inputs are routed to all respective modules internally. The input of some modules must be configured by setting the values of the PSMI[PADSELx] bitfields inside the SIUL module. 5. Programmable via the SRC (Slew Rate Control) bits in the respective Pad Configuration Register. 6. Weak pull down during reset. Table 7. Pin muxing (continued) Port pin Pad configuration register (PCR) Alternate function(1), (2) Functions Peripheral(3) I/O direction (4) Pad speed(5) Pin No. SRC = 0 SRC = 1 |
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