ST7MC1K2 datasheet(249/371 Pages) STMICROELECTRONICS

249 / 371 page

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On-chip peripherals

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Warning:

Grouping channels by pairs imposes the external

connections between the MCO outputs and power devices;

the user must therefore pay attention to respect the

‘recommended schematics’ described in Figure 124 on

page 289 and Figure 125 on page 290.

Note:

As soon as the channels are grouped in pairs, special care has to be taken in configuring

the MPAR register for a PM BLDC drive. If both channels of the same pair are both labelled

‘high’ for example and if the PWM is applied on high channels, the active MCO output x

(OOx = 1 bit in the MPHST register) outputs PWM and the paired MCO output x + 1

(OOx + 1bit in the MPHST register) outputs PWM and vice versa.

Caution:

When PCN = 0 and a complementary PWM is applied (DTE = 1) on one channel of a pair, if

both channels are active, this corresponds in output to both channels OFF. This is for

security purposes to avoid cross-conduction.

Caution:

To clear the DTE bit from reset state of MDTG register (FFh), the PCN bit must be cleared

before.

Table 111.

Deadtime generator outputs

PCN = 0; DTE = 1; x = 0, 2, 4

On/Off x (OOx bit)

On/Off x+1 (OOx+1 bit)

MCOx output

MCOx + 1 output

01 (PWM(1))

PWM generation enabled.

PWM

1 (PWM(1))0

PWM

11 (PWM(1))0

1 (PWM(1))1

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