ST72321R7-Auto datasheet(85/243 Pages) STMICROELECTRONICS

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ST72321xx-Auto

Main clock controller with real-time clock and beeper (MCC/RTC)

Doc ID 13829 Rev 1

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11.8.2

MCC beep control register (MCCBCR)

The beep output signal is available in Active Halt mode but has to be disabled to reduce

consumption.

0OIF

Oscillator interrupt flag

This bit is set by hardware and cleared by software reading the MCCSR register. It

indicates when set that the main oscillator has reached the selected elapsed time

(TB1:0).

0: Timeout not reached

1: Timeout reached

Caution: The BRES and BSET instructions must not be used on the MCCSR

Table 41.

Time base selection

Counter prescaler

Time base

TB1

TB0

fOSC2 =4MHz

fOSC2 =8MHz

16000

4ms

2ms

32000

8ms

4ms

80000

20ms

10ms

200000

50ms

25ms

Table 40.

MCCSR register description (continued)

Bit

Name

Function

MCCBCR

Reset value: 0000 0000 (00h)

543

Reserved

BC[1:0]

-RW

Table 42.

MCCBCR register description

Bit

Name

Function

7:2

Reserved, must be kept cleared.

1:0

BC[1:0]

Beep control

These 2 bits select the PF1 pin beep capability (see Table 43).

Table 43.

Beep frequency selection

BC1

BC0

Beep mode with fOSC2 =8MHz

Off

~2 kHz

Output

Beep signal

~50% duty cycle

~1 kHz

~500 Hz

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