STM32F769AI datasheet(138/255 Pages) STMICROELECTRONICS

138 / 255 page

Electrical characteristics

STM32F765xx STM32F767xx STM32F768Ax STM32F769xx

138/255

DocID029041 Rev 4

APB2

(up to

108 MHz)

TIM1

24.1

23.8

19.6

μA/MHz

TIM8

24.5

24.2

20.0

USART1

17.7

17.4

14.3

USART6

11.9

11.8

9.4

ADC1(5)

4.5

4.7

3.5

ADC2(5)

4.5

4.7

3.3

ADC3(5)

4.5

4.6

3.3

SDMMC1

8.4

8.3

6.9

SDMMC2

8.2

6.4

SPI1/I2S1(3)

3.9

3.6

3.1

SPI4

3.9

3.6

3.1

SYSCFG

2.5

2.2

1.9

TIM9

8.0

6.2

TIM10

5.0

5.1

3.7

TIM11

6.9

5.3

SPI5

2.7

2.8

1.8

SPI6

3.1

3.2

2.2

SAI1

3.2

3.3

2.2

DFSDM1

10.9

10.7

9.0

SAI2

3.9

2.8

MDIO

7.1

7.0

5.8

LTDC

51.2

50.3

41.8

DSI

8.5

8.4

8.1

1. When the I/O compensation cell is ON, IDD typical value increases by 0.22 mA.

2. The BusMatrix is automatically active when at least one master is ON.

3. To enable an I2S peripheral, first set the I2SMOD bit and then the I2SE bit in the SPI_I2SCFGR register.

4. When the DAC is ON and EN1/2 bits are set in DAC_CR register, add an additional power consumption of

0.75 mA per DAC channel for the analog part.

5. When the ADC is ON (ADON bit set in the ADC_CR2 register), add an additional power consumption of

1.73 mA per ADC for the analog part.

Table 39. Peripheral current consumption (continued)

Peripheral

IDD(Typ)(1)

Unit

Scale 1

Scale 2

Scale 3

STM32F769AI 数据表(PDF) 138 Page - STMicroelectronics

STM32F769AI 数据表(HTML) 138 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载