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STM32F769AI 数据表(PDF) 170 Page - STMicroelectronics |
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STM32F769AI 数据表(HTML) 170 Page - STMicroelectronics |
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170 / 255 page  Electrical characteristics STM32F765xx STM32F767xx STM32F768Ax STM32F769xx 170/255 DocID029041 Rev 4 fTRIG(2) External trigger frequency fADC = 30 MHz, 12-bit resolution - - 1764 kHz - - - 17 1/fADC VAIN Conversion voltage range(3) - 0 (VSSA or VREF- tied to ground) -VREF+ V RAIN(2) External input impedance See Equation 1 for details - - 50 k Ω RADC(2)(4) Sampling switch resistance - - - 6 k Ω CADC(2) Internal sample and hold capacitor - - 4 7 pF tlat(2) Injection trigger conversion latency fADC = 30 MHz - - 0.100 μs -- 3(5) 1/fADC tlatr(2) Regular trigger conversion latency fADC = 30 MHz - - 0.067 μs -- 2(5) 1/fADC tS(2) Sampling time fADC = 30 MHz 0.100 - 16 μs - 3 - 480 1/fADC tSTAB(2) Power-up time - - 2 3 μs tCONV(2) Total conversion time (including sampling time) fADC = 30 MHz 12-bit resolution 0.50 - 16.40 μs fADC = 30 MHz 10-bit resolution 0.43 - 16.34 μs fADC = 30 MHz 8-bit resolution 0.37 - 16.27 μs fADC = 30 MHz 6-bit resolution 0.30 - 16.20 μs 9 to 492 (tS for sampling +n-bit resolution for successive approximation) 1/fADC fS(2) Sampling rate (fADC = 36 MHz, and tS = 3 ADC cycles) 12-bit resolution Single ADC - - 2.4 Msps 12-bit resolution Interleave Dual ADC mode - - 4.5 Msps 12-bit resolution Interleave Triple ADC mode - - 7.2 Msps Table 71. ADC characteristics (continued) Symbol Parameter Conditions Min Typ Max Unit |
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